X1205 Xicor, X1205 Datasheet
X1205
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X1205 Summary of contents
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... Home Appliances • Computer Products • Other Industrial / Medical / Automotive DESCRIPTION The X1205 device is a Real Time Clock with clock/ calendar, two polled alarms, oscillator compensation, and battery backup switch. The oscillator uses an external, low-cost 32.768kHz crystal. All compensation and trim components are integrated on the chip ...
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... The RTC has leap-year correction. The clock also corrects for months having fewer than 31 days and has a bit that controls 24 hour or AM/PM format. When the X1205 powers up after the loss of both V CC least one byte is written to the clock register. ...
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... X1205 – Preliminary Information the course of a read operation. In this device, the time is latched by the read command (falling edge of the clock on the ACK bit prior to RTC data output) into a separate latch to avoid time changes during the read operation. The clock continues to run. Alarms occurring during a read are unaffected by the read operation ...
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... EMN0 0000 SCA0 ESC0 REV 1.0.9 8/29/02 – The user can set the X1205 to alarm every Wednes- day at 8: setting the EDWn*, the EHRn* and EMNn* enable bits to ‘1’ and setting the DWAn*, HRAn* and MNAn* Alarm registers to 8:00AM Wednesday. – A daily alarm for 9:30PM results when the EHRn* and EMNn* enable bits are set to ‘ ...
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... RTCF: Real Time Clock Fail Bit—Volatile This bit is set to a ‘1’ after a total power failure. This is a read only bit that is set by hardware (X1205 inter- nally) when the device powers up after having lost all power to the device. The bit is set regardless of ...
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... X1205 – Preliminary Information INTERRUPT CONTROL REGISTER (INT) Interrupt Control and Status Bits (IM, AL1E, AL0E) There are two Interrupt Control bits, Alarm 1 Interrupt Enable (AL1E) and Alarm 0 Interrupt Enable (AL0E) to specifically enable or disable the alarm interrupt signal output (IRQ). The interrupts are enabled when either the AL1E and AL0E bits are set to “ ...
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... X1205 – Preliminary Information WRITING TO THE CLOCK/CONTROL REGISTERS Changing any of the nonvolatile bits of the clock/con- trol register requires the following steps: – Write a 02h to the Status Register to set the Write Enable Latch (WEL). This is a volatile operation, so there is no delay after the write. (Operation pre- ceeded by a start and ended with a stop). – ...
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... A zero selects a write operation. Refer to Figure 6. After loading the entire Slave Address Byte from the SDA bus, the X1205 compares the device identifier and device select bits with ‘1101111’. Upon a correct compare, the device outputs an acknowledge on the SDA line ...
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... D1 of each address byte, the X1205 responds with an acknowledge. After receiving both address bytes the X1205 awaits the eight bits of data. After receiving the 8 data bits, the X1205 again responds with an acknowledge. The master then terminates the transfer by generating a stop condition. The X1205 then begins an internal write cycle of the data to the nonvolatile memory ...
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... Therefore, if the last read was to address n, the next read operation would access data from address n+1. Upon receipt of the Slave Address Byte with the R/W bit set to one, the X1205 issues an acknowledge, then transmits eight data bits. The mas- ter terminates the read operation by not responding with an acknowledge during the ninth clock and issuing a stop condition ...
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... In a similar operation called “Set Current Address,” the device sets the address if a stop is issued instead of the second start shown in Figure 10. The X1205 then goes into standby mode after the stop and all bus Figure 10. Random Address Read Sequence ...
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... X1205 – Preliminary Information ABSOLUTE MAXIMUM RATINGS Temperature Under Bias ................... -65°C to +135°C Storage Temperature......................... -65°C to +150°C Voltage and IRQ CC BACK pin (respect to ground) ............................-0.5V to 7.0V Voltage on SCL, SDA, X1 and X2 pin (respect to ground) ............... -0.5V to 7.0V or 0.5V above (whichever is higher) CC BACK DC Output Current .............................................. 5 mA Lead Temperature (Soldering, 10 sec) ...............300° ...
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... X1205 – Preliminary Information Notes: (1) The device enters the Active state after any start, and remains active: for 9 clock cycles if the Device Select Bits in the Slave Address Byte are incorrect or until 200nS after a stop ending a read or write operation. (2) The device enters the Program state 200nS after a stop ending a write operation and continues for t (3) The device goes into the Timekeeping state 200nS after any stop, except those that initiate a nonvolatile write cycle ...
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... X1205 – Preliminary Information AC Specifications (T = -40°C to +85°C, VCC = +2.7V to +5.5V, unless otherwise specified.) A Symbol f SCL Clock Frequency SCL t Pulse width Suppression Time at inputs IN t SCL LOW to SDA Data Out Valid AA t Time the bus must be free before a new transmission can start ...
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... X1205 – Preliminary Information Write Cycle Timing SCL 8th Bit of Last Byte SDA Power Up Timing Symbol (1) t Time from Power Up to Read PUR (1) t Time from Power Up to Write PUW Notes: (1) Delays are measured from the time V tested. V slew rate should be between 0.2mV/µsec and 50mV/µsec. ...
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... X1205 – Preliminary Information APPLICATION SECTION CRYSTAL OSCILLATOR AND TEMPERATURE COMPENSATION Xicor has now integrated the oscillator compensation circuity on-chip, to eliminate the need for external com- ponents and adjust for crystal drift over temperature and enable very high accuracy timekeeping (<5ppm drift) ...
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... RTC. Care needs to be taken in layout of the RTC circuit to avoid noise pickup. Below in Fig- ure suggested layout for the X1205 SOIC device. Figure 15. Suggested Layout for Xicor RTC in SO-8 REV 1.0.9 8/29/02 The X1 and X2 connections to the crystal are to be kept as short as possible ...
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... X1205 – Preliminary Information The best way to analyze the RTC circuit is to power it up and read the real time clock as time advances the chip has the PHZ output, look at the output of that pin on an oscilloscope (after enabling it with the control register, and using a pullup resistor for an open-drain output) ...
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... X1205 – Preliminary Information Referring to Figure 16, Vtrip applies to the “Internal Vcc” node which powers the entire device. This means that if Vcc is powered down and the battery voltage at Vback is higher than the Vtrip voltage, then the entire chip will be running from the battery. If Vback falls to ...
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... X1205 – Preliminary Information PACKAGING INFORMATION Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) REV 1.0.9 8/29/02 8-Lead Plastic, SOIC, Package Code S8 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.010 (0.25) FOOTPRINT www ...
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... X1205 – Preliminary Information PACKAGING INFORMATION 0° – 8° Detail A (20X) See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) REV 1.0.9 8/29/02 8-Lead Plastic, TSSOP, Package Code V8 .025 (.65) BSC .169 (4.3) .177 (4.5) .114 (2.9) .122 (3.1) .047 (1.20) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .010 (.25) ...
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... X1205 – Preliminary Information ORDERING INFORMATION V Range Package CC 2.7-5.5V 8L SOIC 8L TSSOP PART MARK INFORMATION 8-Lead TSSOP YWW XXXXX 1205 = 2.7 to 5.5V +70°C 1205I = 2.7 to 5.5V, -40 to 85°C LIMITED WARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Xicor, Inc. makes no warranty of merchantability or fi ...