MC68HC705C Motorola, MC68HC705C Datasheet - Page 97

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MC68HC705C

Manufacturer Part Number
MC68HC705C
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet

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MC68HC705C8A — Rev. 2.0
MOTOROLA
NOTE:
Register Name and Address: Alternate Timer Register High — $001A
Register Name and Address: Alternate Timer Register Low — $001B
Reading ATRH returns the current value of the high byte of the counter
and causes the low byte to be latched into a buffer, as shown in
Figure
To prevent interrupts from occurring between readings of ATRH and
ATRL, set the interrupt mask (I bit) in the condition code register before
reading ATRH, and clear the mask after reading ATRL.
Reset:
Reset:
Read:
Read:
Write:
Write:
$001A
Figure 8-9. Alternate Timer Registers (ATRH and ATRL)
8-10.
Bit 15
Bit 7
Bit 7
15
ALTERNATE TIMER REGISTER HIGH
Figure 8-10. Alternate Timer Register Reads
Capture/Compare Timer
= Unimplemented
Bit 14
Bit 6
6
READ ATRH
Bit 13
Bit 5
5
Reset initializes ATRH to $FF
Reset initializes ATRL to $FC
INTERNAL DATA BUS
LATCH
Bit 12
Bit 4
8
4
7
7
ALTERNATE TIMER REGISTER LOW
Bit 11
Bit 3
3
LOW BYTE BUFFER
Bit 10
Bit 2
2
Capture/Compare Timer
Timer I/O Registers
Bit 9
Bit 1
1
Technical Data
0
0
$001B
Bit 0
Bit 8
Bit 0
97

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