CY7C1480BV33_11 CYPRESS [Cypress Semiconductor], CY7C1480BV33_11 Datasheet - Page 29
CY7C1480BV33_11
Manufacturer Part Number
CY7C1480BV33_11
Description
72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined Sync SRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C1480BV33_11.pdf
(36 pages)
- Current page: 29 of 36
- Download datasheet (2Mb)
Switching Waveforms
Figure 6
Document Number: 001-15145 Rev. *F
Notes
24. Device must be deselected when entering ZZ mode. See the section
25. DQs are in High Z when exiting ZZ sleep mode.
shows ZZ mode timing.
ALL INPUTS
(except ZZ)
Outputs (Q)
I
SUPPLY
CLK
ZZ
(continued)
[24, 25]
t ZZI
t ZZ
I DDZZ
CY7C1480BV33, CY7C1482BV33, CY7C1486BV33
Figure 6. ZZ Mode Timing
Truth Table on page 11
DON’T CARE
High-Z
for all possible signal conditions to deselect the device.
DESELECT or READ Only
t RZZI
t ZZREC
Page 29 of 36
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