W83194BR-730_05 WINBOND [Winbond], W83194BR-730_05 Datasheet
W83194BR-730_05
Related parts for W83194BR-730_05
W83194BR-730_05 Summary of contents
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... Register 11: Winbond Chip ID Register (Read Only)......................................................... 12 6.13 Register 12: Winbond Chip ID Register (Read Only)......................................................... 13 7. ORDERING INFORMATION ......................................................................................................... 14 8. HOW TO READ THE TOP MARKING .......................................................................................... 14 9. PACKAGE DRAWING AND DIMENSIONS .................................................................................. 15 10. REVISION HISTORY..................................................................................................................... 16 166MHZ CLOCK FOR SIS CHIPSET - 1 - W83194BR-730 Publication Release Date: May 18, 2005 Revision 1.0 ...
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... PCI clock output divisor ratio. A watch dog timer is quipped and when time out, the RESET# pin will output 4ms pulse signal. The W83194BR-730 accepts a 14.318 MHz reference crystal as its input. Spread spectrum built in at 0~-0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency ...
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... PIN I/O Crystal input with internal loading capacitors and 5 IN feedback resistors. 6 OUT Crystal output at 14.318MHz nominally W83194BR-730 VddLCPU CPUC0$ CPUT0$ CPUCS_C1$ Vss VddSD SDRAM 0 SDRAM 1 SDRAM 2 Vss SDRAM 3 SDRAM 4 SDRAM 5 VddSD SDRAM 6 SDRAM 7 Vss SDRAM 8/PD# SDRAM 9/SDRAM_STOP# ...
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... If pin17 MODE1=0, RESET# (open drain, 4ms low active pulse when Watch Dog time out) Low skew (< 250ps) AGP clock output. 16 I/O Latched Input. SEL24#_48*=1, Pin 21 is 24MHz; SEL24_48*=0, Pin21 is 48MHz AGP clock outputs 17 OUT Latched Input. Mode1*=1, Pin 13 is PCICLK; Mode1*=0, Pin13 is RESET W83194BR-730 FUNCTION ...
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... Power supply for PCICLK[0:5], 3.3V. Power supply for SDRAM[0:12], and CPU PLL core, nominal 3.3V. Power for 24 & 48MHz output buffers and fixed PLL 19 core. Circuit Ground. 9, W83194BR-730 FUNCTION 2 C 2-wire control interface 2 C 2-wire control interface FUNCTION FUNCTION Publication Release Date:May 18, 2005 ...
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... After that, the sequence described below 8 bits dummy Ack Byte count Byte 1 Byte 0 Ack - 6 - W83194BR-730 PCI AGPSEL=0 AGPSEL=1 (MHZ) (MHZ) (MHZ) 33.3 66.6 50 33.3 66 33.3 66.6 50 33.6 67.2 56 31.3 62 ...
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... W83194BR-730 PCI AGPSEL=0 AGPSEL=1 (MHz) (MHz) (MHz) 33.3 66.6 33.3 66 33.3 66.6 33.6 67.2 31.3 62 33.3 66.6 33.3 66 33.3 66 33.3 66 ...
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... W83194BR-730 PCI AGPSEL=0 AGPSEL=1 (MHz) (MHz) (MHz) 32.5 65 48.75 33.75 67.5 50.63 34.5 69 51.75 35.5 71 53.25 34.25 68.5 51.38 34.5 69 51.75 34.75 69.5 52.13 35.75 71.5 53.63 35.75 71.5 53. 43.2 36.25 54.38 43 ...
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... SDRAM12 (Active / Inactive) CPUCS_C1$(Active / Inactive) CPUC0$ (Active / Inactive) CPUT0$ (Active / Inactive) DESCRIPTION AGPCLK1(Active / Inactive) AGPCLK0(Active / Inactive) PCICLK5 (Active / Inactive) PCICLK4 (Active / Inactive) PCICLK3 (Active / Inactive) PCICLK2 (Active / Inactive) PCICLK1 (Active / Inactive) PCICLK0 (Active / Inactive W83194BR-730 DESCRIPTION ...
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... CSkew2 (SDRAM to CPU skew program bit) CSkew1 (SDRAM to CPU skew program bit) CSkew0 (SDRAM to CPU skew program bit) CAkew2 (AGP to CPU skew program bit) CAkew1 (AGP to CPU skew program bit) CAkew0 (AGP to CPU skew program bit) 24_48MHz(Active / Inactive) 48MHz(Active / Inactive W83194BR-730 ...
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... M value bit 3 M value bit 2 M value bit 1 M value bit 0 DESCRIPTION N value bit 7 N value bit 6 N value bit 5 N value bit 4 N value bit 3 N value bit 2 N value bit 1 N value bit W83194BR-730 Publication Release Date:May 18, 2005 Revision 1.0 ...
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... Ratio SEL0 (See ratio selection table) AGP Ratio SEL2 (See ratio selection table1) AGP Ratio SEL1 (See ratio selection table1) AGP Ratio SEL0 (See ratio selection table1) DESCRIPTION Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip W83194BR-730 ...
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... W83194BR-730 Ratio Selection Table 1 REG10 REG10 REG10 VCO/ AGP BIT2 BIT1 BIT0 AGP2 AGP1 AGP0 ratio ...
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... W83194BR-730 8. HOW TO READ THE TOP MARKING W83194BR-730 28051234 1.1.1.1. 002GAB 1st line: Winbond logo and the type number: W83194BR-730 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 814 002: packages made in '00, week 02 G: assembly house ID ...
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... PACKAGE DRAWING AND DIMENSIONS W83194BR-730 Publication Release Date:May 18, 2005 - 15 - Revision 1.0 ...
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... TEL: 1-408-9436666 FAX: 1-408-5441798 Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 16 - W83194BR-730 DESCRIPTION Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No ...