MC14536 ONSEMI [ON Semiconductor], MC14536 Datasheet

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MC14536

Manufacturer Part Number
MC14536
Description
Programmable Timer
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet

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MC14536B
Programmable Timer
counter with 16 stages selectable by a binary code. Provisions for an
on–chip RC oscillator or an external clock are provided. An on–chip
monostable circuit incorporating a pulse–type output has been
included. By selecting the appropriate counter stage in conjunction
with the appropriate input clock frequency, a variety of timing can be
achieved.
2. Maximum Ratings are those values beyond which damage to the device
3. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
to the range V
either V
MAXIMUM RATINGS
March, 2000 – Rev. 5
Symbol
V
The MC14536B programmable timer is a 24–stage binary ripple
I
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
and Fall Times
Schottky TTL Load Over the Rated Temperature Range
24 Flip–Flop Stages — Will Count From 2
Last 16 Stages Selectable By Four–Bit Select Code
8–Bypass Input Allows Bypassing of First Eight Stages
Set and Reset Inputs
Clock Inhibit and Oscillator Inhibit Inputs
On–Chip RC Oscillator Provisions
On–Chip Monostable Output Provisions
Clock Conditioning Circuit Permits Operation With Very Long Rise
Test Mode Allows Fast Test Sequence
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
in
in
Semiconductor Components Industries, LLC, 2000
may occur.
Plastic “P and D/DW” Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
V
T
P
, V
, I
T
T
stg
DD
D
A
L
out
out
SS
or V
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation,
Operating Temperature Range
Storage Temperature Range
Lead Temperature
SS
DD
(DC or Transient)
(DC or Transient) per Pin
per Package (Note 3.)
(8–Second Soldering)
v
). Unused outputs must be left open.
(V
in
Parameter
or V
(Voltages Referenced to V
out
)
v
V
DD
.
in
and V
– 0.5 to V
0
– 0.5 to +18.0
SS
– 55 to +125
– 65 to +150
to 2
out
) (Note 2.)
Value
500
260
should be constrained
24
10
DD
+ 0.5
1
Unit
mW
mA
V
V
C
C
C
1. For ordering information on the EIAJ version of
MC14536BCP
MC14536BDW
MC14536BDWR2
MC14536BF
the SOIC packages, please contact your local
ON Semiconductor representative.
Device
ORDERING INFORMATION
A
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
http://onsemi.com
DW SUFFIX
CASE 751G
SOEIAJ–16
CASE 966
CASE 648
F SUFFIX
P SUFFIX
SOIC–16
SOEIAJ–16
PDIP–16
= Assembly Location
Package
SOIC–16
SOIC–16
PDIP–16
Publication Order Number:
16
1000/Tape & Reel
16
1
16
1
1
MC14536BCP
DIAGRAMS
See Note 1.
MARKING
AWLYYWW
MC14536B
AWLYYWW
AWLYWW
Shipping
2000/Box
MC14536B/D
14536B
47/Rail

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MC14536 Summary of contents

Page 1

... MC14536B Programmable Timer The MC14536B programmable timer is a 24–stage binary ripple counter with 16 stages selectable by a binary code. Provisions for an on–chip RC oscillator or an external clock are provided. An on–chip monostable circuit incorporating a pulse–type output has been included. By selecting the appropriate counter stage in conjunction with the appropriate input clock frequency, a variety of timing can be achieved ...

Page 2

... CLOCK INH. 7 OSC. INHIBIT OUT OUT MC14536B PIN ASSIGNMENT SET RESET 2 15 MONO OSC INH OUT DECODE OUT 8–BYPASS CLOCK INH BLOCK DIAGRAM ...

Page 3

... The formulas given are for the typical characteristics only calculate total supply current at loads other than 50 pF (50 pF – 50) Vfk where (per package pF MC14536B (Voltages Referenced – Vdc Min Max Min V 5.0 — ...

Page 4

... Clock Rise and Fall Time Reset Pulse Width 7. The formulas given are for the typical characteristics only Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. MC14536B = pF, T ...

Page 5

... When Clock Inhibit is low, the counter will start counting on the occurrence of the first negative edge of the clocking source at IN MC14536B PIN DESCRIPTIONS OSC INHIBIT (Pin 14) — A high level on this pin stops the RC oscillator which allows for very low–power standby operation ...

Page 6

... In Set Reset Don’t Care MC14536B TRUTH TABLES Stage Selected Stage Selected 8–Bypass ...

Page 7

... MC14536B LOGIC DIAGRAM http://onsemi.com 7 ...

Page 8

... Figure 3. Typical C versus Pulse Width 5 100 FORMULA FOR CALCULATING t MICROSECONDS IS AS FOLLOWS 0.00247 R W WHERE 100 1 0.1 1.0 Figure 5. Typical C MC14536B 100 5 FUNCTION 2 1 120 k) S 0.5 0 ...

Page 9

... All flip–flops are now at a “1”. The counter is now returned to the normal 24–stages in series configuration. One more pulse is entered into In which will cause the counter to ripple from an all “1” state to an all “0” state. MC14536B ...

Page 10

... MC14536B Comments All 24 stages are in Reset mode Counter is in three 8 stage sections in parallel mode. 0 First “1” to “0” transition of clock. 255 “1” to “0” transitions are clocked in the counter. 1 The 255 “1” to “0” transition. ...

Page 11

... MC14536B PULSE GEN. PULSE GEN. CLOCK IN 1 SET CLOCK INH DECODE OUT POWER UP NOTE: When power is first applied to the device, Decode Out can be either at a high or low state. On the rising edge of a Set pulse the output goes high if initially at a low state. The output remains high if initially at a high state ...

Page 12

... The second and all subsequent pulses occur at 2 period) intervals where n = the number of stages selected from the truth table. Figure 10. Time Interval Configuration Using an External Clock, Reset, and Output Monostable to Achieve a Pulse Output MC14536B + ...

Page 13

... MC14536B 6 8–BYPASS PULSE 2 RESET GEN. 14 SET 15 CLOCK INH 1 MONO–IN 7 CLOCK INH RESET OUT 1 OUT 2 DECODE OUT t w POWER UP NOTE: This circuit is designed to use the on–chip oscillation function. The oscillator frequency is deter- mined by the external R and C components. When power is first applied to the device, Decode Out initializes to a high state. Because this output is tied directly to the Osc– ...

Page 14

... SEATING e PLANE 14X T MC14536B PDIP–16 P SUFFIX NOTES: CASE 648–08 1. DIMENSIONING AND TOLERANCING PER ANSI ISSUE R Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. ...

Page 15

... PLASTIC EIAJ SOIC PACKAGE VIEW 0.10 (0.004) 0.13 (0.005) M MC14536B PACKAGE DIMENSIONS SOEIAJ–16 F SUFFIX CASE 966–01 ISSUE O NOTES DETAIL P c http://onsemi.com 15 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

Page 16

... Email: ONlit–asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549 Phone: 81–3–5740–2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 16 MC14536B/D ...

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