M41T65 STMICROELECTRONICS [STMicroelectronics], M41T65 Datasheet
M41T65
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M41T65 Summary of contents
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... Doc ID 10397 Rev 14 M41T62, M41T63 M41T64, M41T65 3mm 3mm QFN16 ( ±2 parts per million (± SQW IRQ WDO 32K output output output output ✔ ...
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Contents Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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M41T62/63/64/65 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3. M41T62 register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 4. M41T63 register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 5. M41T64 register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 6. M41T65 register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 7. Alarm repeat modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 8. Square wave output frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 9. Initial power-on default values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 10. Century bits examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 11. ...
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... Figure 8. M41T65 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 9. M41T62 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 10. M41T63 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 11. M41T64 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 12. M41T65 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 13. Hardware hookup for SuperCap™ backup operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 14. Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 15. Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 16. Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 17. ...
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Description 1 Description The M41T6x serial access TIMEKEEPER 32.768 kHz oscillator. Eight registers are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 8 registers provide status/control of alarm, 32 KHz output, calibration, ...
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... M41T62/63/64/65 Figure 3. M41T64 logic diagram 1. Open drain. 2. Defaults to 32 KHz on power-up. Figure 4. M41T65 logic diagram 1. Open drain. Figure 5. M41T62 connections 1. SQW output defaults to 32 KHz upon power-up. 2. Open drain M41T64 SCL F SDA M41T65 SCL SDA V SS ...
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... Description Figure 6. M41T63 connections 1. SQW output defaults to 32 KHz upon power-up. 2. Open drain. Figure 7. M41T64 connections 1. Enabled on power-up. 2. Open drain. Figure 8. M41T65 connections 1. Open drain SQW ...
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M41T62/63/64/65 Table 2. Signal names XI XO SDA SCL IRQ/OUT IRQ/FT/OUT SQW F 32K WDO Figure 9. M41T62 block diagram XTAL SDA SCL 1. Open drain. 2. Defaults to 32 KHz on power-up. Figure 10. M41T63 ...
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... Description Figure 11. M41T64 block diagram XTAL SDA SCL 1. Defaults enabled on power-up. 2. Open drain. Figure 12. M41T65 block diagram XTAL SDA SCL 1. Open drain. 10/41 REAL TIME CLOCK OSCILLATOR FAIL 32KHz OSCILLATOR RTC W/ALARM WATCHDOG INTERFACE SQUARE WAVE REAL TIME CLOCK CALENDAR OSCILLATOR FAIL ...
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... M41T62/63/64/65 Figure 13. Hardware hookup for SuperCap™ backup operation Diode required on open drain pin (M41T65 only) for SuperCap (or battery) backup. Low threshold BAT42 diode recommended. 2. For M41T62 and M41T65 (open drain). 3. For M41T63 and M41T65 (open drain). 4. For M41T64 (open drain). ...
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Operation 2 Operation The M41T6x clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 16 bytes contained in the device can then be ...
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M41T62/63/64/65 2.1.4 Data valid The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line may ...
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Operation Figure 15. Acknowledgement sequence SCL FROM MASTER DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER 2.2 READ mode In this mode the master reads the M41T6x slave after setting the slave address (see Figure 17 on page acknowledge bit, ...
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M41T62/63/64/65 Figure 17. READ mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS Figure 18. Alternative READ mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS WORD S ADDRESS (An) SLAVE ADDRESS DATA n+X ...
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Operation 2.3 WRITE mode In this mode the master transmitter transmits to the M41T6x slave receiver. Bus protocol is shown in Figure 19 on page (R/W=0) is placed on the bus and indicates to the addressed device that word address ...
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... If a clock address is being read, an update of the clock registers will be halted. This will prevent a transition of data during the READ. Table 3: M41T62 register map, and Table 6: M41T65 register 29) will also generate an interrupt output. Doc ID 10397 Rev 14 Clock operation ...
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Clock operation 3.1 RTC registers The M41T6x user interface is comprised of 16 memory mapped registers which include clock, calibration, alarm, watchdog, flags, and square wave control. The eight clock counters are accessed indirectly via a set of buffer/transfer registers ...
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M41T62/63/64/65 Write timing When writing to the device, the data is shifted into the M41T62's I edge of the SCL signal. As shown in transferred from the I pointer (not shown). Writes to the clock registers (addresses 0-7) Data written ...
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Clock operation Table 3. M41T62 register map Addr D7 00h 01h ST 02h OFIE 03h 0 04h RS3 05h 0 06h CB1 07h 08h OUT 09h RB2 BMB4 BMB3 0Ah AFE SQWE 0Bh RPT4 RPT5 0Ch RPT3 0Dh RPT2 0Eh ...
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M41T62/63/64/65 Table 4. M41T63 register map Addr D7 D6 00h 0.1 seconds 01h ST 02h 0 03h 0 04h RS3 RS2 05h 0 06h CB1 CB0 07h 08h 0 09h RB2 BMB4 BMB3 0Ah 0 SQWE 0Bh RPT4 RPT5 0Ch ...
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Clock operation Table 5. M41T64 register map Addr D7 00h 0.1 seconds 01h ST 02h 0 03h 0 04h RS3 RS2 05h 0 06h CB1 CB0 07h 08h 0 09h RB2 BMB4 0Ah 0 SQWE 0Bh RPT4 RPT5 0Ch RPT3 ...
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... M41T62/63/64/65 Table 6. M41T65 register map Addr D7 00h 01h ST 02h OFIE 03h 0 04h 0 05h 0 06h CB1 CB0 07h 08h OUT 09h RB2 BMB4 0Ah AFE 0Bh RPT4 RPT5 0Ch RPT3 0Dh RPT2 0Eh RPT1 0Fh WDF Keys must be set to ' alarm flag (read only) ...
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... SQW pin (M41T62/63/64) or the IRQ/FT/OUT pin (M41T65). The SQW pin will toggle at 512 Hz when RS3 = '0,' RS2 = '1,' RS1 = '1,' RS0 = '0 '1,' and ST = '0.' Alternatively, for the M41T65, the IRQ/FT/OUT pin will toggle at 512 Hz when FT and OUT bits = '1' and ST = '0.' Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at the test temperature ...
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M41T62/63/64/65 Figure 21. Crystal accuracy across temperature Frequency (ppm –20 –40 –60 –80 –100 –120 –140 –160 –40 –30 Figure 22. Calibration waveform NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION Δ – –0.036 ...
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Clock operation 3.3 Setting alarm clock registers Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every year, month, ...
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... If the processor does not reset the timer within the specified period, the M41T6x sets the WDF (watchdog flag) and generates an interrupt on the IRQ pin (M41T62 watchdog output pulse (M41T63 and M41T65 only) on the WDO pin. The watchdog timer can only be reset by having the microprocessor perform a WRITE of the watchdog register. ...
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Clock operation 3.6 Square wave output (M41T62/63/64) The M41T62/63/64 offers the user a programmable square wave function which is output on the SQW pin. RS3-RS0 bits located in 04h establish the square wave output frequency. These frequencies are listed in ...
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M41T62/63/64/65 3.8 Century bits These two bits will increment in a binary fashion at the turn of the century, and handle all leap years correctly. See 3.9 Output driver pin (M41T62/65) When the OFIE bit, AFE bit, and watchdog register ...
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... Initial power-on default values Condition Device ST OF OFIE OUT FT AFE SQWE 32KE RS3-1 RS0 Watchdog M41T62 M41T63 Initial (1) power-up M41T64 M41T65 1. All other control bits power undetermined state. Table 10. Century bits examples CB0 Leap year occurs every four years (for years evenly divisible by four), except for years evenly divisible by 100 ...
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M41T62/63/64/65 4 Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions ...
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DC and AC parameters 5 DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC Characteristic tables are derived ...
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M41T62/63/64/65 Table 13. Capacitance Symbol C IN (3) C OUT Effective capacitance measured with power supply at 3.6 V; sampled only, not 100% tested 25° MHz. 3. Outputs deselected. Table 14. DC ...
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DC and AC parameters Table 15. Crystal electrical characteristics Sym f Resonant frequency O R Series resistance (T = – °C, oscillator startup at 2 Load capacitance L 1. For the QFN16 package, user-supplied ...
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M41T62/63/64/65 Table 17. Oscillator characteristics Symbol Oscillator start voltage V STA t Oscillator start time STA C XIN capacitance g C XOUT capacitance d IC-to-IC frequency variation 1. Reference value. T • ...
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Package mechanical information 6 Package mechanical information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available ...
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M41T62/63/64/65 Figure 27. QFN16 – 16-lead, quad, flat package, no lead body size, outline Note: Drawing is not to scale. Table 19. QFN16 – 16-lead, quad, flat package, no lead body size, ...
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Package mechanical information Figure 28. QFN16 – 16-lead, quad, flat package, no lead mm, recommended footprint Note: Dimensions shown are in millimeters (mm). 38/41 1.60 3.55 2.0 0.28 Doc ID 10397 Rev 14 M41T62/63/64/65 AI09126 ...
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M41T62/63/64/65 7 Part numbering Table 20. Ordering information scheme Example: Device family M41T Device type and supply voltage ...
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Revision history 8 Revision history Table 21. Document revision history Date 13-Nov-2003 19-Nov-2003 25-Dec-2003 14-Jan-2004 27-Feb-2004 02-Mar-2004 26-Apr-2004 13-May-2004 06-Aug-2004 11-Oct-2004 18-Jan-2005 05-May-2005 31-Oct-2005 30-Nov-2005 22-Aug-2006 26-Jan-2010 07-May-2010 25-May-2010 40/41 Revision 1.0 First issue Add features, update characteristics 1.1 Figure ...
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M41T62/63/64/65 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at ...