AD5780ACPZ AD [Analog Devices], AD5780ACPZ Datasheet
AD5780ACPZ
Available stocks
Related parts for AD5780ACPZ
AD5780ACPZ Summary of contents
Page 1
Data Sheet FEATURES True 18-bit voltage output DAC, ±1 LSB INL 8 nV/√Hz output noise spectral density 0.025 LSB long-term linearity error stability ±0.018 ppm/°C gain error temperature coefficient 2.5 μs output voltage settling time 3.5 nV-sec midscale glitch impulse ...
Page 2
AD5780 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Companion Products ....................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings............................................................ 8 ...
Page 3
Data Sheet SPECIFICATIONS −16 −12 unloaded unloaded MIN Table 2. Parameter 2 STATIC PERFORMANCE Resolution Integral ...
Page 4
AD5780 Parameter REFERENCE INPUTS V Input Range REFP V Input Range REFN Input Bias Current Input Capacitance LOGIC INPUTS 5 Input Current Input Low Voltage Input High Voltage Pin Capacitance LOGIC OUTPUT (SDO) Output Low Voltage, ...
Page 5
Data Sheet TIMING CHARACTERISTICS 5.5 V; all specifications T CC Table 3. Limit Parameter IOV = 1. 3 ...
Page 6
AD5780 SCLK SYNC t 8 SDIN DB23 t 10 LDAC V OUT V OUT CLR V OUT RESET V OUT t 17 SCLK SYNC t 8 SDIN DB23 INPUT ...
Page 7
Data Sheet t 17 SCLK SYNC t 8 SDIN DB23 INPUT WORD FOR DAC N DB23 SDO DB0 DB23 INPUT WORD FOR DAC ...
Page 8
AD5780 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 4. Parameter Rating V to AGND −0 + AGND −34 ...
Page 9
Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 V Analog Output Voltage. OUT 2 V Positive Reference Voltage Input. A voltage in the range REFP 3, ...
Page 10
AD5780 TYPICAL PERFORMANCE CHARACTERISTICS 0.4 AD8675 OUTPUT BUFFER T = 25°C A 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 0 50000 100000 150000 200000 DAC CODE Figure 6. Integral Nonlinearity Error vs. DAC Code, ±10 V Span 0.6 AD8675 ...
Page 11
Data Sheet 0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 AD8675 OUTPUT BUFFER T = 25°C A –0.4 0 50000 100000 150000 200000 DAC CODE Figure 12. Differential Nonlinearity Error vs. DAC Code Span 0.6 AD8675 OUTPUT ...
Page 12
AD5780 0.35 DNL MAX 0.30 0.25 0. 25° +10V REFP V = –10V REFN 0.15 AD8675 OUTPUT BUFFER 0.10 0.05 DNL MIN 0 –0.05 12.5 13.0 13.5 14.0 14.5 15.0 V /|V | (V) DD ...
Page 13
Data Sheet 0. 25° +10V 0.45 REFP V = –10V REFN AD8675 OUTPUT BUFFER 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 12.5 13.0 13.5 14.0 14.5 15.0 V /| ...
Page 14
AD5780 –0. AD8675 OUTPUT BUFFER –0.10 –0.15 –0.20 –0.25 –0.30 –0.35 –0.40 5.0 5.5 6.0 6.5 7.0 7.5 8.0 V /|V | (V) REFP REFN Figure 30. Zero-Scale Error vs. Reference Voltage –0.2 ...
Page 15
Data Sheet 1.0 ±10V SPAN +10V SPAN +5V SPAN 0.5 0 –0.5 –1.0 –1.5 –2.0 –2 AD8675 OUTPUT BUFFER –3.0 –40 – TEMPERATURE (°C) Figure 36. Zero-Scale Error vs. Temperature 0 ±10V SPAN ...
Page 16
AD5780 REFP V REFN RC LOW-PASS FILTER 1 UNITY-GAIN MODE ADA4898-1 OUTPUT BUFFER 0 – TIME (µs) Figure 42. 500 Code Step Settling Time ...
Page 17
Data Sheet 100 100 FREQUENCY (Hz) Figure 48. Noise Spectral Density vs. Frequency 200 V = +15V –15V SS 180 V = +10V REFP V = –10V REFN 160 140 120 100 ...
Page 18
AD5780 TERMINOLOGY Relative Accuracy Relative accuracy, or integral nonlinearity (INL measure of the maximum deviation, in LSB, from a straight line passing through the endpoints of the DAC transfer function. A typical INL error vs. code plot is ...
Page 19
Data Sheet THEORY OF OPERATION The AD5780 is a high accuracy, fast settling, single, 18-bit, serial input, voltage output DAC. It operates from a V voltage of 7 16.5 V and a V supply of −16 ...
Page 20
AD5780 Standalone Operation The serial interface works with both a continuous and noncon- tinuous serial clock. A continuous SCLK source can be used only if SYNC is held low for the correct number of clock cycles. In gated clock mode, ...
Page 21
Data Sheet Asynchronous DAC Update In this mode, LDAC is held high while data is being clocked into the input shift register. The DAC output is asynchronously updated by taking LDAC low after SYNC has been taken high. The update ...
Page 22
AD5780 Control Register The control register controls the mode of operation of the AD5780. Clearcode Register The clearcode register sets the value to which the DAC output is set when the CLR pin or CLR bit in the software control ...
Page 23
Data Sheet Software Control Register This is a write only register in which writing particular bit has the same effect as pulsing the corresponding pin low. Table 13. Software Control Register MSB DB23 DB22 DB21 R/W ...
Page 24
AD5780 AD5780 FEATURES POWER- The AD5780 contains a power-on reset circuit that, as well as resetting all registers to their default values, controls the output voltage during power-up. Upon power-on, the DAC is placed in tristate (its ...
Page 25
Data Sheet Gain of Two Configuration (×2 Gain Mode) Figure 54 shows an output amplifier configured for a gain of two. The gain is set by the internal matched 6.8 kΩ resistors, which are exactly twice the DAC resistance, having ...
Page 26
AD5780 APPLICATIONS INFORMATION TYPICAL OPERATING CIRCUIT Figure 55. Typical Operating Circuit Rev Page Data Sheet 09649-054 ...
Page 27
Data Sheet Figure 55 shows a typical operating circuit for the using an AD8675 as an output buffer. Because the output impedance of the AD5780 is 3.4 kΩ, an output buffer is required for driving low resistive, high capacitive loads. ...
Page 28
... SEATING PLANE ORDERING GUIDE 1 Model Temperature Range AD5780ACPZ −40°C to +125°C AD5780ACPZ-REEL7 −40°C to +125°C AD5780BCPZ −40°C to +125°C AD5780BCPZ-REEL7 −40°C to +125°C EVAL-AD5780SDZ RoHS Compliant Part. ©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...