DAC1208D650HN NXP [NXP Semiconductors], DAC1208D650HN Datasheet - Page 35
DAC1208D650HN
Manufacturer Part Number
DAC1208D650HN
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1208D650HN.pdf
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NXP Semiconductors
DAC1208D650
Product data sheet
Figure 23
input level (V
Figure 24
common-mode input level (V
The constraints to adjusting the interface are the output compliance range of the DAC and
the auxiliary DACs, the input common-mode level of the AQM, and the range of offset
correction.
Fig 23. Example of a DC interface connected to an AQM with a V
Fig 24. Example of a DC interface connected to an AQM with a V
auxiliary DACs
auxiliary DACs
is an example of a DC interface connected to an AQM with a common-mode
is an example of a DC interface connected to an to an AQM with a
i(cm)
IOUTnN
IOUTnN
IOUTnP
IOUTnP
AUXnN
AUXnN
AUXnP
AUXnP
All information provided in this document is subject to legal disclaimers.
(1)
(1)
) of 1.7 V when using auxiliary DACs.
(1)
(2)
(1)
(2)
0 mA to 20 mA
Rev. 2 — 14 December 2010
1.1 mA (typ.)
IOUTnP/IOUTnN; V
BBP/BBN; V
IOUTnP/IOUTnN; V
BBP/BBN; V
V
51.1 Ω
54.9 Ω
634 Ω
442 Ω
DDA(3V3)
3.3 V
i(cm)
2×, 4× or 8× interpolating DAC with JESD204A interface
i(cm)
i(cm)
51.1 Ω
54.9 Ω
634 Ω
442 Ω
) of 3.3 V when using auxiliary DACs.
= 1.7 V; V
= 3.3 V; V
o(cm)
o(cm)
442 Ω
442 Ω
237 Ω
237 Ω
= 2.67 V; V
= 2.75 V; V
i(dif)(p-p)
i(dif)(p-p)
750 Ω
698 Ω
51.1 Ω
= 1.23 V; offset correction up to 36 mV
= 1.5 V; offset correction up to 36 mV
o(dif)(p-p)
o(dif)(p-p)
5 V
750 Ω
698 Ω
51.1 Ω
= 1.94 V
= 1.96 V
DAC1208D650
BBP
BBN
BBP
BBN
AQM (V
AQM (V
(2)
(2)
i(cm)
i(cm)
i(cm)
i(cm)
of 1.7 V when using
of 3.3 V when using
001aaj543
001aaj544
= 1.7 V)
= 3.3 V)
© NXP B.V. 2010. All rights reserved.
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