DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 40
DAC1408D650C1
Manufacturer Part Number
DAC1408D650C1
Description
Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650C1.pdf
(98 pages)
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NXP Semiconductors
Table 19.
Default settings are shown highlighted.
Table 20.
Default settings are shown highlighted.
DAC1408D650
Preliminary data sheet
Bit
7
6
2
1
0
Bit
7
6
5
4 to 2
Symbol
SPI_3W
SPI_RST
DF
PD_ALL
GAP_PD
Symbol
NCO_EN
NCO_LP_SEL
INV_SINE_EN
MODE[2:0]
10.15.2.2 Page 0 bit definition detailed description
COMMON register (address 00h) bit description
TXCFG register (address 01h) bit description
Please refer to
values emphasized in bold are the default values.
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
Table 18
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
Rev. 02 — 11 August 2010
for a register overview for page 0. In the following tables, all the
Value
0
1
0
1
0
1
0
1
0
1
Value
0
1
0
1
0
1
000
001
010
011
100
Description
serial interface bus type
serial interface reset
data format
power-down
internal bandgap power-down
Description
NCO
low-power NCO
modulation
x / (sin x) function
4 wire SPI
3 wire SPI
no reset
performs a reset on all registers except 0x00
unsigned format
signed (two’s compliment) format
no action
all circuits (digital and analog) are switched off
no action
internal bandgap references are switched off
disabled (the NCO phase is reset to 0)
enabled
NCO may use all 32 bits
NCO frequency and phase given by the five
MSBs of the registers 06h and 08h respectively
disabled
enabled
dual DAC: no modulation
positive upper single sideband up-conversion
positive lower single sideband up-conversion
negative upper single sideband up-conversion
negative lower single sideband up-conversion
DAC1408D650
© NXP B.V. 2010. All rights reserved.
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