XC2VP7 XILINX [Xilinx, Inc], XC2VP7 Datasheet - Page 93
XC2VP7
Manufacturer Part Number
XC2VP7
Description
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
1.XC2VP7.pdf
(430 pages)
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Table 32: IOB Input Switching Characteristics (Continued)
DS083 (v4.7) November 5, 2007
Product Specification
Notes:
1. Input timing for LVCMOS25 is measured at 1.25V. For other I/O standards, see
Setup and Hold Times With Respect to
Clock at IOB Input Register
Set/Reset Delays
Pad, no delay
Pad, with delay
ICE input
SR input (IFF, synchronous)
SR input to IQ (asynchronous)
GSR to output IQ
R
Description
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
T
T
T
IOPICKD
IOICECK
IOPICK
Symbol
T
T
T
IOSRCKI
IOSRIQ
GSRQ
/T
/T
/T
IOICKP
IOICKPD
IOCKICE
www.xilinx.com
XC2VPX20
XC2VPX70
XC2VP100
XC2VP20
XC2VP30
XC2VP40
XC2VP50
XC2VP70
XC2VP2
XC2VP4
XC2VP7
Device
All
All
All
All
All
0.84/–0.61
2.28/–1.89
2.55/–2.10
2.48/–2.05
2.63/–2.05
2.63/–2.05
2.67/–2.07
3.28/–2.56
3.84/–3.02
3.98/–3.13
3.98/–3.13
0.39/ 0.01
Table
0.52
1.13
5.87
N/A
-7
36.
Speed Grade
0.86/–0.63
2.60/–2.15
2.87/–2.36
2.82/–2.32
3.02/–2.35
3.02/–2.35
3.09/–2.42
3.61/–2.83
4.08/–3.21
4.23/–3.33
4.23/–3.33
6.48/–5.13
0.44/ 0.01
0.57
1.27
6.75
-6
0.90/–0.67
2.95/–2.43
3.21/–2.65
3.15/–2.60
3.40/–2.66
3.40/–2.66
3.49/–2.73
4.01/–3.15
4.42/–3.48
4.55/–3.58
4.55/–3.58
7.04/–5.57
0.49/ 0.01
0.75
1.42
7.43
-5
Module 3 of 4
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
Units
22
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