EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 121
EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 121 of 396
- Download datasheet (5Mb)
PS019209-0504
RAM Control Registers
space and a particular Memory Chip Select address space, the Memory Chip
Select is not activated. On-chip RAM is not accessible to external devices during
bus acknowledge cycles.
RAM Control Register
Internal data RAM can be disabled by clearing the GPRAM_EN bit. The default
upon RESET is for RAM to be enabled. See Table 31.
Table 31. RAM Control Register
(RAM_CTL = 00B4h)
Bit
Reset
CPU Access
Note: R/W = Read/Write; R = Read Only.
Bit
Position
7
GPRAM_EN
6
ERAM_EN
[5:0]
Value
0
1
0
1
000000 Reserved
R/W
P R E L I M I N A R Y
7
1
Description
On-chip general-purpose RAM is disabled.
On-chip general-purpose RAM is enabled.
On-chip EMAC RAM is disabled.
On-chip EMAC RAM is enabled.
R/W
6
1
R
5
0
R
4
0
R
3
0
Product Specification
Random Access Memory
R
2
0
eZ80F91 MCU
R
1
0
R
0
0
102
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