MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 128
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
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System Integration Module (SIM)
Advance Information
128
R/W
I-BIT
I-bit
IDB
R/W
IAB
INTERRUPT
IAB
IDB
INTERRUPT
MODULE
MODULE
DUMMY
DUMMY
SP – 4
processing can resume.
Figure 8-8
.
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt may take precedence, regardless of priority,
until the latched interrupt is serviced (or the I-bit is cleared). See
8-8.
SP
PC – 1[7:0]
CCR
SP – 3
SP – 1
Figure 8-8. Interrupt Recovery
Figure 8-7
System Integration Module (SIM)
PC – 1[15:8]
shows interrupt recovery timing.
A
SP – 2
SP – 2
X
X
.
SP – 1
SP – 3
Interrupt Entry
Figure 8-7
PC – 1[7:0]
A
SP – 4
SP
PC – 1[15:8]
CCR
VECT H
shows interrupt entry timing, and
PC
V DATA H
OPCODE
VECT L
PC + 1
MC68HC08AZ60A — Rev 0.0
OPERAND
V DATA L
START ADDRESS
OPCODE
MOTOROLA
Figure
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