MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 234
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
(480 pages)
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Serial Communications Interface (SCI)
16.9.2 SCI Control Register 2
Advance Information
234
NOTE:
PTY — Parity Bit
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
SCI control register 2:
M
0
1
0
0
1
1
This read/write bit determines whether the SCI generates and checks
for odd parity or even parity. (See
bit.
•
Control Bits
1 = Odd parity
0 = Even parity
Enables the following CPU interrupt requests:
– Enables the SCTE bit to generate transmitter CPU interrupt
– Enables the TC bit to generate transmitter CPU interrupt
– Enables the SCRF bit to generate receiver CPU interrupt
– Enables the IDLE bit to generate receiver CPU interrupt
Serial Communications Interface (SCI)
PEN:PTY
requests
requests
requests
requests
0X
0X
10
10
11
11
Table 16-8. Character Format Selection
Start
Bits
1
1
1
1
1
1
Data
Bits
8
9
7
7
8
8
Table
Character Format
Parity
None
None
Even
Even
Odd
Odd
16-8). Reset clears the PTY
MC68HC08AZ60A — Rev 0.0
Stop
Bits
1
1
1
1
1
1
Character
MOTOROLA
Length
10 Bits
11 Bits
10 Bits
10 Bits
11 Bits
11 Bits
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