MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 297
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
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18.9.2 TIMB Counter Registers
MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
The two read-only TIMB counter registers contain the high and low bytes
of the value in the TIMB counter. Reading the high byte (TBCNTH)
latches the contents of the low byte (TBCNTL) into a buffer. Subsequent
reads of TBCNTH do not affect the latched TBCNTL value until TBCNTL
is read. Reset clears the TIMB counter registers. Setting the TIMB reset
bit (TRST) also clears the TIMB counter registers.
If TBCNTH is read during a break interrupt, be sure to unlatch TBCNTL
by reading TBCNTL before exiting the break interrupt. Otherwise,
TBCNTL retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 18-5. TIMB Counter Registers (TBCNTH and TBCNTL)
Register Name and Address TBCNTH — $0041
Register Name and Address TBCNTL — $0042
BIT 15
BIT 7
Bit 7
Bit 7
R
R
R
0
0
Timer Interface Module B (TIMB)
R = Reserved
BIT 14
BIT 6
R
R
6
0
6
0
BIT 13
BIT 5
R
R
5
0
5
0
BIT 12
BIT 4
R
R
4
0
4
0
BIT 11
BIT 3
R
R
3
0
3
0
Timer Interface Module B (TIMB)
BIT 10
BIT 2
R
R
2
0
2
0
Advance Information
BIT 1
BIT 9
R
R
1
0
1
0
I/O Registers
BIT 8
BIT 0
Bit 0
Bit 0
R
R
0
0
297
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