MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 38
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
(480 pages)
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General Description
Advance Information
38
V
OSC1
OSC2
CGMXFC
IRQ
RST
RxCAN
TxCAN
1. Hysteresis is not 100% tested but is typically a minimum of 300mV.
DDAREF
PIN NAME
Signal name
CGMXCLK
CGMOUT
Bus Clock
ADC Power supply
External Clock In
External Clock Out
PLL Loop Filter Cap
External Interrupt Request
Reset
MSCAN08 Serial Input
MSCAN08 Serial Output
SPSCK
TACLK
TBCLK
MSCAN08
Module
Table 1-1. External Pins Summary (Continued)
ADC
COP
CPU
Details of the clock connections to each of the modules on the
MC68HC08AZ60A are shown in
clock source is also given in
FUNCTION
Buffered version of OSC1 from Clock Generator Module (CGM)
CGMOUT divided by two
PLL-based or OSC1-based clock output from Clock Generator Module
SPI serial clock
External clock Input for TIMA
External clock Input for TIMB
(CGM)
Table 1-2. Signal Name Conventions
Table 1-3. Clock Source Summary
CGMXCLK or Bus Clock
CGMXCLK or CGMOUT
CGMXCLK
Bus Clock
General Description
NA
NA
NA
NA
NA
NA
NA
Output
DRIVER TYPE
Table
Table
Description
1-2.
Clock source
1-3. A short description of each
NA
YES
NA
NA
YES
YES
YES
NA
HYSTERESIS
MC68HC08AZ60A — Rev 0.0
(1)
NA
Input (Hi-Z)
Output
NA
Input (Hi-Z)
Input (Hi-Z)
Input (Hi-Z)
Output
RESET STATE
MOTOROLA
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