MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 383
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
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21.14.5 MSCAN08 Receiver Flag Register (CRFLG)
MC68HC08AZ60A — Rev 0.0
MOTOROLA
Address:
All bits of this register are read and clear only. A flag can be cleared by
writing a 1 to the corresponding bit position. A flag can be cleared only
when the condition which caused the setting is valid no more. Writing a
0 has no effect on the flag setting. Every flag has an associated interrupt
enable flag in the CRIER register. A hard or soft reset will clear the
register.
WUPIF — Wakeup Interrupt Flag
RWRNIF — Receiver Warning Interrupt Flag
1. Condition to set the flag: RWRNIF = (96 ð REC) & RERRIF & TERRIF & BOFFIF
Reset:
Read:
Write:
If the MSCAN08 detects bus activity while in Sleep mode, it sets the
WUPIF flag. If not masked, a wake-up interrupt is pending while this
flag is set.
This flag is set when the MSCAN08 goes into warning status due to
the receive error counter (REC) exceeding 96 and neither one of the
Error Interrupt flags or the Bus-off Interrupt flag is set
masked, an error interrupt is pending while this flag is set.
1 = MSCAN08 has detected activity on the bus and requested
0 = No wake-up interrupt has occurred.
1 = MSCAN08 has gone into receiver warning status.
0 = No receiver warning status has been reached.
WUPIF
$0504
Bit 7
wake-up.
MSCAN08 Controller (MSCAN08)
0
Figure 21-19. Receiver Flag Register (CRFLG)
RWRNIF
6
0
TWRNIF
5
0
RERRIF
4
0
Programmer’s Model of Control Registers
TERRIF
3
0
MSCAN08 Controller (MSCAN08)
BOFFIF
2
0
Advance Information
(1)
OVRIF
. If not
1
0
Bit 0
RXF
0
383
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