ADAU1373BCBZ-RL AD [Analog Devices], ADAU1373BCBZ-RL Datasheet - Page 217
ADAU1373BCBZ-RL
Manufacturer Part Number
ADAU1373BCBZ-RL
Description
Low Power Codec with Speaker and Headphone Amplifier
Manufacturer
AD [Analog Devices]
Datasheet
1.ADAU1373BCBZ-RL.pdf
(296 pages)
- Current page: 217 of 296
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DRC2_CTRL14 REGISTER
Address: 0x9D, Reset: 0x20, Name: DRC2_CTRL14
DRC2 Enable Control
Table 180. Bit Descriptions for DRC2_CTRL14
Bits
7
6
5
4
3
2
[1:0]
Bit Name
DRCNGTGT
DRCNGHDEN
DRCNGSRC
DRCCESRC
DRCLMSRC
DRCNGEN
DRCEN
Settings
00
01
10
11
0
1
0
1
0
1
0
1
0
1
0
1
Description
DRC2 Noise Gate Recovery Target.
Target: DRC minimum output
Target: determined by DRC curve
DRC2 Noise Gate Recovery Hold Enable.
DRC noise gate recovery hold time disable
DRC noise gate recovery hold time enable
DRC2 Noise Gate Recovery Source.
RMS
Peak (default)
DRC2 Compressor/Expander Source.
RMS
Peak
DRC2 Limiter Source.
RMS
Peak
DRC2 Noise Gating Enable.
DRC noise gate disable
DRC noise gate enable
DRC2 Enable.
None (default)
Right channel enable
Left channel enable
Both channels enable
Rev. 0 | Page 217 of 296
Reset
0x0
0x0
0x1
0x0
0x0
0x0
0x0
ADAU1373
Access
RW
RW
RW
RW
RW
RW
RW
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