PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 126
PIC18F24J11
Manufacturer Part Number
PIC18F24J11
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F24J11.pdf
(536 pages)
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PIC18F46J11 FAMILY
9.4
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Priority registers (IPR1, IPR2, IPR3). Using
the priority bits requires that the Interrupt Priority
Enable (IPEN) bit be set.
REGISTER 9-10:
DS39932D-page 126
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
PMPIP
R/W-1
IPR Registers
(1)
These bits are unimplemented on 28-pin devices.
PMPIP: Parallel Master Port Read/Write Interrupt Priority bit
1 = High priority
0 = Low priority
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
RC1IP: EUSART1 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX1IP: EUSART1 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
SSP1IP: Master Synchronous Serial Port Interrupt Priority bit (MSSP1 module)
1 = High priority
0 = Low priority
CCP1IP: ECCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
ADIP
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1 (ACCESS F9Fh)
W = Writable bit
‘1’ = Bit is set
RC1IP
R/W-1
R/W-1
TX1IP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSP1IP
R/W-1
(1)
CCP1IP
R/W-1
2011 Microchip Technology Inc.
x = Bit is unknown
TMR2IP
R/W-1
TMR1IP
R/W-1
bit 0
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