PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 96
PIC18F24J11
Manufacturer Part Number
PIC18F24J11
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F24J11.pdf
(536 pages)
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PIC18F46J11 FAMILY
6.3.5
The STATUS register in
arithmetic status of the ALU. The STATUS register can
be the operand for any instruction, as with any other
register. If the STATUS register is the destination for an
instruction that affects the Z, DC, C, OV or N bits, then
the write to these five bits is disabled.
These bits are set or cleared according to the device
logic. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended. For example, CLRF STATUS will set the Z bit
but leave the other bits unchanged. The STATUS
REGISTER 6-2:
DS39932D-page 96
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second
operand.
STATUS REGISTER
Unimplemented: Read as ‘0’
N: Negative bit
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was negative
(ALU MSB = 1).
1 = Result was negative
0 = Result was positive
OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit magnitude,
which causes the sign bit (bit 7) to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the 4
0 = No carry-out from the 4
C: Carry/borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the MSb of the result occurred
0 = No carry-out from the MSb of the result occurred
U-0
—
STATUS REGISTER (ACCESS FD8h)
Register
W = Writable bit
‘1’ = Bit is set
(1)
U-0
—
6-2, contains the
(1)
th
th
low-order bit of the result occurred
low-order bit of the result
R/W-x
N
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
register then reads back as ‘000u u1uu’. It is recom-
mended, therefore, that only BCF, BSF, SWAPF, MOVFF
and MOVWF instructions are used to alter the STATUS
register because these instructions do not affect the Z,
C, DC, OV or N bits in the STATUS register.
For other instructions not affecting any Status bits, see
the instruction set summary in
Table
OV
Note:
27-3.
The C and DC bits operate as a borrow
and digit borrow bits respectively, in
subtraction.
R/W-x
Z
2011 Microchip Technology Inc.
x = Bit is unknown
R/W-x
DC
(1)
Table 27-2
R/W-x
C
(2)
bit 0
and
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