MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 116

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Clock Generator Module (CGM)
8.6.3 PLL Programming Register
Advance Information
116
Address:
The PLL programming register contains the programming information
for the modulo feedback divider and the programming information for the
hardware configuration of the VCO.
MUL[7:4] — Multiplier Select Bits
Reset:
Read:
Write:
These read/write bits control the modulo feedback divider that selects
the VCO frequency multiplier, N. (See
Circuit
modulo feedback divider the same as a value of $1. Reset initializes
these bits to $6 to give a default multiply value of 6.
MUL7:MUL6:MUL5:MUL4
$001E
MUL7
Bit 7
Table 8-1. VCO Frequency Multiplier (N) Selection
R
0
(PLL).) A value of $0 in the multiplier select bits configures the
Figure 8-7. PLL Programming Register (PPG)
Clock Generator Module (CGM)
0000
0001
0010
0011
1101
1110
1111
= Reserved
MUL6
6
1
MUL5
5
1
MUL4
4
0
VCO Frequency Multiplier (N)
VRS7
8.4.2 Phase-Locked Loop
3
0
MC68HC708AS48
VRS6
2
1
13
14
15
1
1
2
3
VRS5
1
1
MOTOROLA
—
Rev. 4.0
VRS4
Bit 0
0