MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 130

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

System Integration Module (SIM)
9.3.3 Clocks in Stop Mode and Wait Mode
9.4 Reset and System Initialization
Advance Information
130
Upon exit from stop mode by an interrupt, break, or reset, the SIM allows
CGMXCLK to clock the SIM counter. The CPU and peripheral clocks do
not become active until after the stop delay timeout. This timeout is
selectable as 4096 or 32 CGMXCLK cycles. (See
In wait mode, the CPU clocks are inactive. However, some modules can
be programmed to be active in wait mode. Refer to the wait mode
subsection of each module to see if the module is active or inactive in
wait mode.
The MCU has these reset sources:
Each of these resets produces the vector $FFFE–FFFF ($FEFE–FEFF
in monitor mode) and assert the internal reset signal (IRST). IRST
causes all registers to be returned to their default values and all modules
to be returned to their reset states.
An internal reset clears the SIM counter (see
external reset does not. Each of the resets sets a corresponding bit in
the SIM reset status register (SRSR). (See
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Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit module (LVI)
Illegal opcode
Illegal address
System Integration Module (SIM)
9.8 SIM
9.5 SIM
MC68HC708AS48
9.7.2 Stop
Registers.)
Counter), but an
MOTOROLA
Mode.)
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Rev. 4.0