MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 152

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Low-Voltage Inhibit (LVI)
10.5 LVI Status Register
Advance Information
152
NOTE:
Address:
The LVI status register flags V
LVILCK — LVI Lock Bit
LVISTOP — LVI Disable in Stop Mode Bit
To meet the stop mode I
LVIOUT — LVI Output Bit
Reset:
Read: LVIOUT
Write:
This read/write bit inhibits writing to the LVI status and control
register. When LVILCK is set, writing to the LVI status and control
register has no effect. The LVILCK bit can be cleared only by reset.
This read/write bit turns off the low-voltage inhibit module (LVI) in stop
mode when clear.
This read-only flag becomes set when the V
V
LVII
1 = LVISCR write-protected
0 = LVISCR not write-protected
1 = LVI not disabled during stop mode
0 = LVI disabled during stop mode
$FE0F
voltage. (See
Bit 7
R
R
0
V
Figure 10-3. LVI Status Register (LVISR)
Low-Voltage Inhibit (LVI)
LVII
= Reserved
V
V
Table 10-1. LVIOUT Bit Indication
DD
DD
R
6
0
0
V
V
> V
DD
DD
V
LVIR
Table
LVII
V
DD
LVIR
R
5
0
0
specification, LVISTOP must be at logic 0.
10-1.) Reset clears the LVIOUT bit.
DD
voltages below the V
R
4
0
0
LVISTOP
3
0
Previous Value
DD
MC68HC708AS48
LVIOUT
LVILCK
voltage falls below the
2
0
0
1
LVII
level.
R
1
0
0
MOTOROLA
Rev. 4.0
Bit 0
R
0
0

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