MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 190

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Input/Output (I/O) Ports
Advance Information
190
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
DDRA
Bit
0
1
Input/Output (I/O) Ports
PTA
Bit
X
X
Table 15-1. Port A Pin Functions
Input, Hi-Z
I/O Pin
Output
Mode
Read/Write
DDRA[7:0]
DDRA[7:0]
Accesses
to DDRA
MC68HC708AS48
Table 15-1
PTA[7:0]
Read
Accesses to PTA
Pin
summarizes
MOTOROLA
PTA[7:0]
PTA[7:0]
Write
Rev. 4.0
(1)

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