MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 205

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
15.8 Port F
15.8.1 Port F Data Register
MC68HC708AS48
MOTOROLA
NOTE:
NOTE:
Rev. 4.0
Function:
Alternate
Address:
Port F is a 5-bit special function port that shares four of its pins with the
timer interface module (TIM).
The port F data register contains a data latch for each of the five port F
pins.
PTF[4:0] — Port F Data Bits
PTF4 is available only in the 64-pin QFP package.
TCH[5:2] — Timer Channel I/O Bits
Data direction register F (DDRF) does not affect the data direction of port
F pins that are being used by the TIM. However, the DDRF bits always
Reset:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port F pin is under the control of the corresponding bit in data
direction register F. Reset has no effect on PTF[4:0].
The PTF3/TCH5–PTF0/TCH2 pins are the TIM input capture/output
compare pins. The edge/level select bits, ELSxB:ELSxA, determine
whether the PTF3/TCH5–PTF0/TCH2 pins are timer channel I/O pins
or general-purpose I/O pins. (See
Control
$0009
Bit 7
R
R
0
Registers.)
Figure 15-17. Port F Data Register (PTF)
Input/Output (I/O) Ports
= Reserved
R
6
0
R
5
0
Unaffected by Reset
PTF4
4
16.9.4 TIM Channel Status and
TCH5
PTF3
3
TCH4
PTF2
2
Input/Output (I/O) Ports
Advance Information
TCH3
PTF1
1
TCH2
PTF0
Bit 0
Port F
205

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