MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 229

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

MC68HC708AS48
MOTOROLA
NOTE:
—
Rev. 4.0
Address:
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
TSTOP — TIM Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode.
Reset:
Read:
Write:
This read/write flag is set when the TIM counter resets to $0000 after
reaching the modulo value programmed in the TIM counter modulo
registers. Clear TOF by reading the TIM status and control register
when TOF is set and then writing a logic 0 to TOF. If another TIM
overflow occurs before the clearing sequence is complete, then
writing logic 0 to TOF has no effect. Therefore, a TOF interrupt
request cannot be lost due to inadvertent clearing of TOF. Reset
clears the TOF bit. Writing a logic 1 to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
This read/write bit stops the TIM counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIM
counter until software clears the TSTOP bit.
1 = TIM counter has reached modulo value.
0 = TIM counter has not reached modulo value.
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
1 = TIM counter stopped
0 = TIM counter active
Figure 16-4. TIM Status and Control Register (TSC)
$0020
Bit 7
TOF
R
0
0
Timer Interface (TIM)
= Reserved
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
R
3
0
0
PS2
2
0
Timer Interface (TIM)
Advance Information
PS1
1
0
I/O Registers
Bit 0
PS0
0
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