MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 236

no-image

MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Timer Interface (TIM)
Advance Information
236
NOTE:
MSxA — Mode Select Bit A
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
When ELSxB:A
operation or unbuffered output compare/PWM operation. (See
16-2.)
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TCHx pin. (See
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E or port F, and pin PTEx/TCHx or pin PTFx/TCHx is available
as a general-purpose I/O pin.
ELSxA work. Reset clears the ELSxB and ELSxA bits.
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Timer Interface (TIM)
00, this read/write bit selects either input capture
Table
16-2.) Reset clears the MSxA bit.
Table 16-2
shows how ELSxB and
MC68HC708AS48
MOTOROLA
Rev. 4.0
Table

Related parts for MC68HC708AS48