MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 266

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Serial Communications Interface (SCI)
Advance Information
266
NOTE:
Address:
LOOPS — Loop Mode Select Bit
ENSCI — Enable SCI Bit
TXINV — Transmit Inversion Bit
Setting the TXINV bit inverts all transmitted values, including idle, break,
start, and stop bits.
Reset:
Read:
Write:
This read/write bit enables loop mode operation. In loop mode the
PTE1/RxD pin is disconnected from the SCI, and the transmitter
output goes into the receiver input. Both the transmitter and the
receiver must be enabled to use loop mode. Reset clears the LOOPS
bit.
This read/write bit enables the SCI and the SCI baud rate generator.
Clearing ENSCI sets the SCTE and TC bits in SCI status register 1
and disables transmitter interrupts. Reset clears the ENSCI bit.
This read/write bit reverses the polarity of transmitted data. Reset
clears the TXINV bit.
1 = Loop mode enabled
0 = Normal operation enabled
1 = SCI enabled
0 = SCI disabled
1 = Transmitter output inverted
0 = Transmitter output not inverted
LOOPS
Serial Communications Interface (SCI)
$0013
Bit 7
0
Figure 17-9. SCI Control Register 1 (SCC1)
ENSCI
6
0
TXINV
5
0
M
4
0
WAKE
3
0
MC68HC708AS48
ILTY
2
0
PEN
1
0
MOTOROLA
Rev. 4.0
Bit 0
PTY
0

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