MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 322

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Analog-to-Digital Converter (ADC)
19.6 Low-Power Modes
19.6.1 Wait Mode
19.6.2 Stop Mode
19.7 I/O Signals
19.7.1 ADC Analog Power Pin (V
Advance Information
322
The low-power modes are described here.
The ADC continues normal operation during wait mode. Any enabled
CPU interrupt request from the ADC can bring the MCU out of wait
mode. If the ADC is not required to bring the MCU out of wait mode,
power down the ADC by setting the ADCH[4:0] bits in the ADC status
and control register to logic 1s before executing the WAIT instruction.
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode. Allow one conversion cycle to stabilize the analog
circuitry before attempting a new ADC conversion after exiting stop
mode.
In the 52-pin PLCC package, the ADC module has 15 channels that are
shared with I/O ports B and D and one channel with an input-only port
bit on port D. In the 64-pin QFP package, the ADC module has 16
channels that are shared with I/O ports B and D and one channel with an
input-only port bit on port D. Refer to
voltages referenced below.
The ADC analog portion uses V
the V
filtering may be necessary to ensure clean V
results.
V
conversions. Connect the V
DDA
DDA
/V
DDAREF
/V
Analog-to-Digital Converter (ADC)
DDAREF
DDAREF
is the high reference voltage for all analog-to-digital
)/ADC Voltage Reference Pin (V
pin to the same voltage potential as V
REFH
DDA
pin to a voltage potential between
/V
21.7 ADC Characteristics
DDAREF
DDA
as its power pin. Connect
MC68HC708AS48
/V
DDAREF
REFH
DD
)
for good
. External
MOTOROLA
Rev. 4.0
for

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