MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 328

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Analog-to-Digital Converter (ADC)
Advance Information
328
NOTE:
ADICLK — ADC Input Clock Register Bit
During the conversion process, changing the ADC clock will result in an
incorrect conversion.
ADICLK selects either bus clock or CGMXCLK as the input clock
source to generate the internal ADC clock. Reset selects CGMXCLK
as the ADC clock source.
If the external clock (CGMXCLK) is equal to or greater than 1 MHz,
CGMXCLK can be used as the clock source for the ADC. If
CGMXCLK is less than 1 MHz, use the PLL-generated bus clock as
the clock source. As long as the internal ADC clock is at
approximately 1 MHz, correct operation can be guaranteed. (See
21.7 ADC
1 = Internal bus clock
0 = External clock (CGMXCLK)
Analog-to-Digital Converter (ADC)
Characteristics.)
X = don’t care
ADIV2
1 MHz =
0
0
0
0
1
Table 19-2. ADC Clock Divide Ratio
ADIV1
X
0
0
1
1
f
XCLK
or Bus Frequency
ADIV0
ADIV[2:0]
X
0
1
0
1
ADC Input Clock / 16
ADC Input Clock / 2
ADC Input Clock / 4
ADC Input Clock / 8
ADC Input Clock /1
ADC Clock Rate
MC68HC708AS48
MOTOROLA
Rev. 4.0

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