MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 334

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Byte Data Link Controller–Digital (BDLC–D)
20.4.1 BDLC Operating Modes
20.4.1.1 Power Off Mode
Advance Information
334
NETWORK ACTIVITY OR
OTHER MCU WAKEUP
BDLC STOP
Figure 20-3. BDLC Operating Modes State Diagram
(COP, ILLADDR, PU, RESET, LVR, POR)
ANY MCU RESET SOURCE ASSERTED
The BDLC has five main modes of operation which interact with the
power supplies, pins, and rest of the MCU as shown in
For the BDLC to guarantee operation, this mode is entered from reset
mode whenever the BDLC supply voltage, V
minimum specified value. The BDLC will be placed in reset mode by
low-voltage reset (LVR) before being powered down. In power off mode,
the pin input and output specifications are not guaranteed.
V
DD
STOP INSTRUCTION OR
WAIT INSTRUCTION AND WCM = 1
FROM ANY MODE
V
Byte Data Link Controller–Digital (BDLC–D)
DD
(MINIMUM)
POWER OFF
RESET
RUN
V
ANY MCU RESET SOURCE ASSERTED
DD
NO MCU RESET SOURCE ASSERTED
WAIT INSTRUCTION AND WCM = 0
> V
DD
(MINIMUM) AND
NETWORK ACTIVITY OR
OTHER MCU WAKEUP
BDLC WAIT
DD
MC68HC708AS48
, drops below its
Figure
MOTOROLA
20-3.
Rev. 4.0

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