MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 342

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Byte Data Link Controller–Digital (BDLC–D)
Advance Information
342
IFS — Inter-Frame Separation Symbol
BREAK — Break
symbol, if no response is transmitted after an EOD symbol, it
becomes an EOF, and the message is assumed to be completed. The
EOF flag is set upon receiving the EOF symbol.
The IFS symbol is a 20- s passive period on the J1850 bus which
allows proper synchronization between nodes during continuous
message transmission. The IFS symbol is transmitted by a node after
the completion of the end-of-frame (EOF) period and, therefore is
seen as a 300- s passive period.
When the last byte of a message has been transmitted onto the J1850
bus and the EOF symbol time has expired, all nodes then must wait
for the IFS symbol time to expire before transmitting a start-of-frame
(SOF) symbol, marking the beginning of another message.
However, if the BDLC is waiting for the IFS period to expire before
beginning a transmission and a rising edge is detected before the IFS
time has expired, it will synchronize internally to that edge.
A rising edge may occur during the IFS period because of varying
clock tolerances and loading of the J1850 bus, causing different
nodes to observe the completion of the IFS period at different times.
To allow for individual clock tolerances, receivers must synchronize to
any SOF occurring during an IFS period.
The BDLC cannot transmit a BREAK symbol.
If the BDLC is transmitting at the time a BREAK is detected, it treats
the BREAK as if a transmission error had occurred and halts
transmission.
If the BDLC detects a BREAK symbol while receiving a message, it
treats the BREAK as a reception error and sets the invalid symbol flag
in the BSVR, also ignoring the frame it was receiving. If while
receiving a message in 4X mode, the BDLC detects a BREAK
symbol, it treats the BREAK as a reception error, sets the invalid
symbol flag, and exits 4X mode (the RX4XE bit in BCR2 is cleared
automatically). If bus control is required after the BREAK symbol is
received and the IFS time has elapsed, the programmer must resend
the transmission byte using highest priority.
Byte Data Link Controller–Digital (BDLC–D)
MC68HC708AS48
MOTOROLA
—
Rev. 4.0