MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 383

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
21.8 5.0 Vdc 10% Serial Peripheral Interface (SPI) Timing
MC68HC708AS48
MOTOROLA
Num
1. Item numbers refer to dimensions in
2. All timing is shown with respect to 30% V
3. f
4. Time to data active from high-impedance state
5. Hold time to high-impedance state
6. With 100 pF on all SPI pins
10
11
1
2
3
4
5
6
7
8
9
BUS
(1)
= the currently active bus frequency for the microcontroller.
Operating frequency
Cycle time
Enable lead time
Enable lag time
Clock (SCK) high time
Clock (SCK) low time
Data setup time (inputs)
Data hold time (inputs)
Access time, slave
Slave disable time (hold time to high-impedance
Data valid time after enable edge
Data hold time (outputs, after enable edge)
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
CPHA = 0
CPHA = 1
state)
Master
Slave
Master
Slave
(5)
Rev. 4.0
(4)
Characteristic
(3)
Figure 21-1
DD
and 70% V
(6)
Electrical Specifications
(2)
and
Figure
DD
,
unless otherwise noted; assumes 100 pF load on all SPI pins.
21-2.
5.0 Vdc 10% Serial Peripheral Interface (SPI) Timing
t
t
t
t
W(SCKH)M
W(SCKH)S
W(SCKL)M
Symbol
W(SCKL)S
f
f
t
t
t
t
t
t
t
BUS(
BUS(S)
t
t
A(CP0)
A(CP1)
cyc(M)
HO(M)
cyc(S)
SU(M)
t
t
HO(S)
t
SU(S)
t
t
LEAD
t
H(M)
V(M)
LAG
H(S)
V(S)
DIS
M
)
f
BUS
Min
100
100
15
15
50
50
45
15
dc
2
1
5
0
0
0
0
5
/128
Electrical Specifications
Advance Information
f
BUS
Max
f
128
BUS
40
20
25
10
40
/2
MHz
Unit
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
383

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