MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 51

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
MC68HC708AS48
MOTOROLA
Addr.
$003C
$003D
$FE00
$FE01
$FE03
$FE07
$003A
$003B
$003E
$003F
BDLC Analog and Roundtrip
BDLC State Vector Register
SIM Break Status Register
SIM Reset Status Register
ADC Input Clock Register
EPROM Control Register
BDLC Control Register 1
BDLC Control Register 2
SIM Break Flag Control
Delay Register (BARD)
BDLC Data Register
Register Name
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 8)
Register (SBFCR)
See page 327.
See page 358.
See page 360.
See page 363.
See page 371.
See page 373.
See page 144.
See page 146.
See page 147.
Rev. 4.0
See page 59.
(ADICLK)
(EPMCR)
(BSVR)
(SBSR)
(SRSR)
(BCR1)
(BCR2)
(BDR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
ALOOP
ADIV2
Bit 7
BCFE
IMSG
POR
BD7
ATE
R
R
R
R
R
0
1
1
1
0
0
1
0
0
0
Memory Map
= Reserved
DLOOP
RXPOL
ADIV1
CLKS
BD6
PIN
R
R
R
R
R
6
0
1
1
1
0
0
X
0
0
RX4XE
ADIV0
COP
BD5
R1
I3
5
R
R
R
R
R
R
0
0
0
1
0
0
0
0
0
Indeterminate after Reset
U = Unaffected
ADICLK
NBFS
ILOP
BD4
R0
I2
R
R
R
R
R
R
4
0
0
0
0
0
0
0
0
0
TEOD
ILAD
BO3
BD3
I1
3
R
R
R
R
R
R
R
0
0
0
0
0
0
0
0
0
0
X = Indeterminate
Input/Output (I/O) Section
TSIFR
ELAT
BO2
BD2
I0
2
R
R
R
R
R
R
0
0
1
0
0
0
0
0
0
0
Advance Information
TMIFR1
SBSW
BO1
BD1
LVI
IE
R
R
R
R
R
1
0
0
1
0
0
0
0
0
X
0
0
Memory Map
TMIFR0
EPGM
Bit 0
WCM
BO0
BD0
R
R
R
R
R
0
0
1
0
0
0
0
0
0
0
51

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