MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 64

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Configuration Register (CONFIG)
5.4 Configuration Register
Advance Information
64
NOTE:
Address:
reset. All of the configuration bits are cleared with reset. Since the
various options affect the operation of the MCU it is recommended that
this register be written immediately after reset. For compatibility, a write
to the ROM version of this MCU at this location will have no effect. The
configuration register may be read at any time.
The configuration register will allow only one write between resets.
LVIPWRD— LVI Power Disable Bit
LVIRSTD — LVI Reset Disable Bit
SSREC — Short Stop Recovery Bit
Reset:
Read:
Write:
LVIPWRD disables the LVI module. (See
Inhibit
LVIRSTD disables the reset signal from the LVI module. (See
Section 10. Low-Voltage Inhibit
SSREC enables the CPU to exit stop mode with a delay of 32
CGMXCLK cycles instead of a 4096-CGMXCLK cycle delay. (See
16.6.2 Stop
1 = LVI module power disabled
0 = LVI module power enabled
1 = LVI module resets disabled
0 = LVI module resets enabled
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
$001F
Bit 7
R
R
Configuration Register (CONFIG)
(LVI).)
Figure 5-1. Configuration Register (CONFIG)
= Reserved
Mode.)
R
6
LVIRSTD LVIPWRD
R
5
Unaffected by Reset
R
4
(LVI).)
SSREC
R
3
Section 10. Low-Voltage
MC68HC708AS48
COPL
R
2
STOP
R
1
MOTOROLA
—
Rev. 4.0
COPD
Bit 0
R