PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 171

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PIC18F25J50

Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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REGISTER 11-2:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
CSF1
2:
This register is only available on 44-pin devices.
These bits have no effect when their corresponding pins are used as address lines.
CSF<1:0>: Chip Select Function bits
11 = Reserved
10 = Chip select function is enabled and PMCS acts as chip select (in Master mode). Up to
01 = Reserved
00 = Chip select function is disabled (in Master mode). All 16 address bits can be generated.
ALP: Address Latch Polarity bit
1 = Active-high (PMALL and PMALH)
0 = Active-low (PMALL and PMALH)
Unimplemented: Maintain as ‘0’
CS1P: Chip Select Polarity bit
1 = Active-high (PMCS)
0 = Active-low (PMCS)
BEP: Byte Enable Polarity bit
1 = Byte enable is active-high (PMBE)
0 = Byte enable is active-low (PMBE)
WRSP: Write Strobe Polarity bit
For Slave modes and Master Mode 2 (PMMODEH<1:0> = 00,01,10):
1 = Write strobe is active-high (PMWR)
0 = Write strobe is active-low (PMWR)
For Master Mode 1 (PMMODEH<1:0> = 11):
1 = Enable strobe is active-high (PMENB)
0 = Enable strobe is active-low (PMENB)
RDSP: Read Strobe Polarity bit
For Slave modes and Master Mode 2 (PMMODEH<1:0> = 00,01,10):
1 = Read strobe is active-high (PMRD)
0 = Read strobe is active-low (PMRD)
For Master Mode 1 (PMMODEH<1:0> = 11):
1 = Read/write strobe is active-high (PMRD/PMWR)
0 = Read/write strobe is active-low (PMRD/PMWR)
R/W-0
CSF0
13 address bits only can be generated.
PMCONL: PARALLEL PORT CONTROL REGISTER LOW BYTE (BANKED F5Eh)
W = Writable bit
‘1’ = Bit is set
R/W-0
ALP
(2)
(2)
(2)
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J50 FAMILY
R/W-0
CS1P
(2)
R/W-0
BEP
x = Bit is unknown
WRSP
R/W-0
DS39931D-page 171
R/W-0
RDSP
bit 0
(1)

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