FDC37B787QF SMSC [SMSC Corporation], FDC37B787QF Datasheet - Page 137
FDC37B787QF
Manufacturer Part Number
FDC37B787QF
Description
Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.FDC37B787QF.pdf
(249 pages)
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2.
RTC Interrupt
The interrupt generated by the RTC is an active
high output. The RTC interrupt output remains
high as long as the status bit causing the interrupt
is present and the corresponding interrupt-enable
bit is set.
register C clears the RTC interrupt.
All 14 bytes are directly writable and readable by the host with the following exceptions:
a.
b.
c.
Registers 00-0D are initialized to 00h.
Access to all registers from the host are
blocked.
Register C is read only
Bit 7 of Register A and Bit 7 of Register D are read only
Bit 0 of Register B is read only
ADDRESS
0E-7Ch
7Dh
7Eh
7Fh
C
D
0
1
2
3
4
5
6
7
8
9
A
B
Activating RESET_DRV or reading
REGISTER TYPE
Table 62 - Real Time Clock Address Map, Bank 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Register 0: Seconds
Register 1: Seconds Alarm
Register 2: Minutes
Register 3: Minutes Alarm
Register 4: Hours
Register 5: Hours Alarm
Register 6: Day of Week
Register 7: Date of Month
Register 8: Month
Register 9: Year
Register A:
Register B: (Bit 0 is Read Only)
Register C:
Register D:VRT and Day of Month Alarm
Register E-7C: General Purpose
Register 7D: Century Byte
Register 7E: Control Register 1
Register 7F:General Purpose
139
The RTC Interrupt is brought out by programming
the RTC Primary Interrupt Select to a non-zero
value. If IRQ 8 is selected then the polarity of this
IRQ 8 output is programmable through a bit in the
OSC Global Configuration Register.
Internal Registers
Table 62 shows the address map for bank 0 of the
RTC; time, calendar, alarm, control, status bytes
and 114 bytes of "CMOS" registers.
REGISTER FUNCTION
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