MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 122

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Clock Generator Module (CGM)
8.5.4 PLL VCO Range Select Register
Data Sheet
122
NOTE:
Address:
The PLL VCO range select register (PMRS) contains the programming
information required for the hardware configuration of the VCO.
VRS[7:0] — VCO Range Select Bits
The VCO range select bits have built-in protection such that they cannot
be written when the PLL is on (PLLON = 1) and such that the VCO clock
cannot be selected as the source of the base clock (BCS = 1) if the VCO
range select bits are all clear.
The PLL VCO range select register must be programmed correctly.
Incorrect programming can result in failure of the PLL to achieve lock.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
These read/write bits control the hardware center-of-range linear
multiplier L which, in conjunction with E (See
8.3.6 Programming the
controls the hardware center-of-range frequency, f
cannot be written when the PLLON bit in the PCTL is set. (See
Special Programming
range select register disables the PLL and clears the BCS bit in the
PLL control register (PCTL). (See
and
register to $40 for a default range multiply value of 64.
For More Information On This Product,
Figure 8-8. PLL VCO Range Select Register (PMRS)
8.3.7 Special Programming
$003A
VRS7
Bit 7
0
Go to: www.freescale.com
VRS6
6
1
VRS5
5
0
Exceptions.) A value of $00 in the VCO
PLL, and
VRS4
4
0
8.3.8 Base Clock Selector Circuit
Exceptions.). Reset initializes the
8.5.1 PLL Control
VRS3
MC68HC908AP Family — Rev. 2.5
3
0
8.3.3 PLL
VRS2
2
0
VRS
. VRS[7:0]
Register.),
VRS1
Circuits,
1
0
MOTOROLA
VRS0
Bit 0
8.3.7
0