MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 159
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 159 of 454
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10.4.2 Phase-Locked Loop Circuit (PLL)
10.4.2.1 Circuits
MC68HC908AS60 — Rev. 1.0
MOTOROLA
$001C
$001D
$001E
Addr.
PLL Programming Register
PLL Bandwidth Control
PLL Control Register
Register (PBWC)
Register Name
See page 169.
See page 171.
See page 173.
(PCTL)
The PLL is a frequency generator that can operate in either acquisition
mode or tracking mode, depending on the accuracy of the output
frequency. The PLL can change between acquisition and tracking
modes either automatically or manually.
The PLL consists of these circuits:
(PPG)
•
•
•
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 10-2. I/O Register Summary
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Voltage-controlled oscillator (VCO)
Modulo VCO frequency divider
Phase detector
Loop filter
Lock detector
Clock Generator Module (CGM)
PLLIE
AUTO
MUL7
Bit 7
Go to: www.freescale.com
0
0
0
= Unimplemented
LOCK
MUL6
PLLF
6
0
0
1
PLLON
MUL5
ACQ
5
1
0
1
MUL4
BCS
XLD
4
0
0
0
VRS7
3
1
1
0
0
0
Clock Generator Module (CGM)
VRS6
2
1
1
0
0
1
Functional Description
VRS5
Technical Data
1
1
1
0
0
1
VRS4
Bit 0
1
1
0
0
0
159
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