MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 213
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
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15.6 LVI Interrupts
15.7 Low-Power Modes
15.7.1 Wait Mode
15.7.2 Stop Mode
MC68HC908AS60 — Rev. 1.0
MOTOROLA
The LVI module does not generate interrupt requests.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
With the LVIPWR bit in the configuration register programmed to logic 1,
the LVI module is active after a WAIT instruction.
With the LVIRST bit in the configuration register programmed to logic 1,
the LVI module can generate a reset and bring the MCU out of wait
mode.
With the LVISTOP and LVIPWR bits in the configuration register
programmed to a logic 1, the LVI module will be active after a STOP
instruction. Because CPU clocks are disabled during stop mode, the LVI
trip must bypass the digital filter to generate a reset and bring the MCU
out of stop.
With the LVIPWR bit in the configuration register programmed to logic 1
and the LVISTOP bit at a logic 0, the LVI module will be inactive after a
STOP instruction.
Freescale Semiconductor, Inc.
For More Information On This Product,
Low-Voltage Inhibit (LVI) Module
Go to: www.freescale.com
Low-Voltage Inhibit (LVI) Module
Technical Data
LVI Interrupts
213
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