MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 392
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 392 of 454
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Timer Interface Module A (TIMA-6)
22.8.1 TIMA Clock Pin (PTD6/ATD14/TCLK)
22.8.2 TIMA Channel I/O Pins (PTF3–PTF0/TACH2 and PTE3/TACH1–PTE2/TACH0)
22.9 I/O Registers
Technical Data
392
PTD6/TACLK is an external clock input that can be the clock source for
the TIMA counter instead of the prescaled internal bus clock. Select the
PTD6/TACLK input by writing logic 1s to the three prescaler select bits,
PS[2:0]. (See
minimum TCLK pulse width, TCLK
The maximum TCLK frequency is the least: 4 MHz or bus frequency 2.
PTD6/TACLK is available as a general-purpose I/O pin or ADC channel
when not used as the TIMA clock input. When the PTD6/TACLK pin is
the TIMA clock input, it is an input regardless of the state of the DDRD6
bit in data direction register D.
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTE2/TACH0, PTE6/TACH2, and
PTF2 can be configured as buffered output compare or buffered PWM
pins.
These I/O registers control and monitor TIMA operation:
•
•
•
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
TIMA status and control register (TASC)
TIMA control registers (TACNTH–TACNTL)
TIMA counter modulo registers (TAMODH–TAMODL)
TIMA channel status and control registers (TASC0, TASC1,
TASC2, TASC3, TASC4, and TSAC5)
TIMA channel registers (TACH0H–TACH0L, TACH1H–TACH1L,
TACH2H–TACH2L, TACH3H–TACH3L, TACH4H–TACH4L, and
TACH5H–TACH5L)
Timer Interface Module A (TIMA-6)
Go to: www.freescale.com
22.9.1 TIMA Status and Control
------------------------------------ -
bus frequency
1
LMIN
or TCLK
+
t
SU
MC68HC908AS60 — Rev. 1.0
HMIN
Register.) The
, is:
MOTOROLA
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