MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 73
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 73 of 454
- Download datasheet (6Mb)
4.8.2 FLASH-2 Block Protect Register
MC68HC908AS60 — Rev. 1.0
MOTOROLA
NOTE:
Address:
By programming the block protect bits, a portion of the memory will be
locked so that no further erase or program operations may be
performed. Programming more than one bit at a time is redundant. If
both bit 1 and bit 2 are set, for instance, the address range
$9000–$FFFF is locked. If all bits are erased, then all of the memory is
available for erase and program. The presence of a voltage V
IRQ pin will bypass the block protection so that all of the memory,
including the block protect register, is open for program and erase
operations.
This block protect register controls the FLASH-2 array block protection.
However, since it is physically located in the FLASH-1 array, the
FLASH-1 control register must be used to program/erase this register.
The block protect register (FLBPR2) is implemented as a byte within the
FLASH-1 memory. Each bit, when programmed, protects a range of
addresses in the FLASH-2 array.
BPR3 — Block Protect Register Bit 3
Reset:
Read:
Write:
This bit protects the FLASH memory contents in the address range
$4000–$7FFF.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Address range protected from erase or program
0 = Address range open to erase or program
Figure 4-4. FLASH-2 Block Protect Register (FLBPR2)
$FF81
Bit 7
0
0
Go to: www.freescale.com
= Unimplemented
FLASH-1 Memory
6
0
0
5
0
0
4
0
0
BPR3
3
0
BPR2
2
0
FLASH Block Protection
FLASH-1 Memory
BPR1
1
0
Technical Data
HI
on the
BPR0
Bit 0
0
73
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