MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 162
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
(226 pages)
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Input/Output (I/O) Ports
12.5.1 Port D Data Register (PTD)
Technical Data
162
Additional Functions
Address:
The port D data register contains a data latch for each of the eight port D
pins.
PTD[7:0] — Port D Data Bits
ADC[11:8] — ADC channels 11 to 8
TCH[1:0] — Timer Channel I/O
Reset:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port D pin is under the control of the corresponding bit in data
direction register D. Reset has no effect on port D data.
ADC[11:8] are pins used for the input channels to the analog-to-digital
converter module. The channel select bits, ADCH[4:0], in the ADC
status and control register define which port pin will be used as an
ADC input and overrides any control from the port I/O logic. See
Section 11. Analog-to-Digital Converter
The TCH1 and TCH0 pins are the TIM input capture/output compare
pins. The edge/level select bits, ELSxB:ELSxA, determine whether
the PTD4/TCH0 and PTD5/TCH1 pins are timer channel I/O pins or
general-purpose I/O pins. See
(TIM).
(Slow Edge)
5k pull-up 5k pull-up
25mA sink
$0003
PTD7
(Sink)
Bit 7
LED
Figure 12-9. Port D Data Register (PTD)
Input/Output (I/O) Ports
(Slow Edge)
25mA sink
(Sink)
PTD6
LED
6
PTD5
TCH1
5
Unaffected by reset
TCH0
PTD4
Section 10. Timer Interface Module
4
MC68H(R)C908JL3E/JK3E/JK1E
ADC8
PTD3
(Sink)
LED
3
(ADC).
ADC9
PTD2
(Sink)
LED
2
ADC10
PTD1
1
MOTOROLA
—
Rev. 2.0
ADC11
PTD0
Bit 0
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