MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 87
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
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7.5.3 SIM Counter and Reset States
7.6 Exception Control
7.6.1 Interrupts
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
External reset has no effect on the SIM counter. (See
for details.) The SIM counter is free-running after all reset states. (See
7.4.2 Active Resets from Internal Sources
internal reset recovery sequences.)
Normal, sequential program execution can be changed in three different
ways:
An interrupt temporarily changes the sequence of program execution to
respond to a particular event.
system interrupts.
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared).
•
•
•
—
Interrupts
– Maskable hardware CPU interrupts
– Non-maskable software interrupt instruction (SWI)
Reset
Break interrupts
Rev. 2.0
System Integration Module (SIM)
Figure 7-8
flow charts the handling of
System Integration Module (SIM)
for counter control and
7.7.2 Stop Mode
Exception Control
Technical Data
87
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