MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 340
MC68HC908LK24
Manufacturer Part Number
MC68HC908LK24
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908LK24.pdf
(465 pages)
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Analog-to-Digital Converter (ADC)
16.5 Interrupts
16.6 Low-Power Modes
16.6.1 Wait Mode
16.6.2 Stop Mode
16.7 I/O Signals
Data Sheet
340
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled. The interrupt vector is
defined in
The STOP and WAIT instructions put the MCU in low power-
consumption standby modes.
The ADC continues normal operation in wait mode. Any enabled CPU
interrupt request from the ADC can bring the MCU out of wait mode. If
the ADC is not required to bring the MCU out of wait mode, power down
the ADC by setting the ADCH[4:0] bits to logic 1’s before executing the
WAIT instruction.
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode. Allow one conversion cycle to stabilize the analog
circuitry before attempting a new ADC conversion after exiting stop
mode.
The ADC module has ten channels, six channels are shared with port A
and port B I/O pins; two channels are the ADC voltage reference inputs,
V
1.2V bandgap reference voltage.
REFH
Freescale Semiconductor, Inc.
For More Information On This Product,
and V
Analog-to-Digital Converter (ADC)
Table 2-1 . Vector
Go to: www.freescale.com
REFL
; one channel is the V
Addresses.
LCD
input; and one channel is the
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
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