MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 382
MC68HC908LK24
Manufacturer Part Number
MC68HC908LK24
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908LK24.pdf
(465 pages)
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Input/Output (I/O) Ports
Data Sheet
382
When DDRAx is a logic 1, reading address $0000 reads the PTAx data
latch. When DDRAx is a logic 0, reading address $0000 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 18-2
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
DDRA
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
PTA Bit
X
summarizes the operation of the port A pins.
X
(1)
Go to: www.freescale.com
Input/Output (I/O) Ports
Table 18-2. Port A Pin Functions
Input, Hi-Z
I/O Pin Mode
Figure 18-4. Port A I/O Circuit
RESET
Output
(2)
Accesses to DDRA
DDRAx
PTAx
DDRA[7:0]
DDRA[7:0]
Read/Write
MC68HC908LJ24/LK24 — Rev. 2
PTA[7:0]
Read
Pin
Accesses to PTA
MOTOROLA
PTA[7:0]
PTA[7:0]
Write
PTAx
(3)
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