ADT7476ARQH ONSEMI [ON Semiconductor], ADT7476ARQH Datasheet - Page 62
ADT7476ARQH
Manufacturer Part Number
ADT7476ARQH
Description
dBCOOL Remote Thermal Controller and Voltage Monitor
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.ADT7476ARQH.pdf
(67 pages)
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1. If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
1. If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Table 44. Register 0x75 — Interrupt Mask Register 2 (Power−On Default [7:0] = 0x00)
Table 45. Register 0x76 — Extended Resolution Register 1 (Power−On Default [7:0] = 0x00)
Table 46. Register 0x77 — Extended Resolution Register 2 (Power−On Default [7:0] = 0x00)
Bit No.
Bit No.
Bit No.
[1:0]
[3:2]
[5:4]
[7:6]
[1:0]
[3:2]
[5:4]
[7:6]
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Mnemonic
Mnemonic
Mnemonic
12 V/VC
TDM1
TDM2
LTMP
FAN1
FAN2
FAN3
2.5 V
V
5.0 V
OVT
12 V
F4P
V
D1
D2
CCP
CC
Read−only
Read−only
Read−only
Read−only
Read−only
Read−only
Read−only
Read−only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
When Pin 21 is configured as a 12 V input, 12 V/VC = 1 masks SMBALERT for out−of−limit
conditions on the 12 V channel. When Pin 21 is programmed as VID5, this bit masks an
SMBALERT, if the VID5 VID code bit changes.
OVT = 1 masks SMBALERT for overtemperature THERM conditions.
FAN1 = 1 masks SMBALERT for a Fan 1 fault.
FAN2 = 1 masks SMBALERT for a Fan 2 fault.
FAN3 = 1 masks SMBALERT for a Fan 3 fault.
If Pin 14 is configured as TACH4, F4P = 1 masks SMBALERT for a Fan 4 fault. If Pin 14 is
configured as THERM, F4P = 1 masks SMBALERT for an exceeded THERM timer limit. If Pin 14
is configured as GPIO, F4P = 1 masks SMBALERT when GPIO is an input and GPIO is asserted.
D1 = 1 masks SMBALERT for a diode open or short on a Remote 1 channel.
D2 = 1 masks SMBALERT for a diode open or short on a Remote 2 channel.
2.5 V LSBs. Holds the 2 LSBs of the 10−bit 2.5 V measurement.
V
V
5.0 V LSBs. Holds the 2 LSBs of the 10−bit 5.0 V measurement.
12 V LSBs. Holds the 2 LSBs of the 10−bit 12 V measurement.
Remote 1 temperature LSBs. Holds the 2 LSBs of the 10−bit Remote 1 temperature
measurement.
Local temperature LSBs. Holds the 2 LSBs of the 10−bit local temperature measurement.
Remote 2 temperature LSBs. Holds the 2 LSBs of the 10−bit Remote 2 temperature
measurement.
CCP
CC
LSBs. Holds the 2 LSBs of the 10−bit V
LSBs. Holds the 2 LSBs of the 10−bit V
http://onsemi.com
62
Description
Description
Description
CC
CCP
measurement.
measurement.
(Note 1)
(Note 1)
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