PCI9656-BA66BIG PLX [PLX Technology], PCI9656-BA66BIG Datasheet - Page 4

• Manufacturer Part Number: PCI9656-BA66BIG
• Manufacturer: PLX [PLX Technology]

© 2002 by PLX Technology, Inc. All rights reserved. PLX and Data Pipe Architecture are trademarks of PLX Technology, Inc. All oth
trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and r
Technology, Inc. reserves the right, without notice, to make changes in product design or speci cation.
9656-SIL-PB-P1-1.0
D e v e l o p m e n t T o o l s S u p p o r t
To minimize risk and lower your product
development costs, PLX o ers Software
Development Kits (SDKs) and Rapid
Development Kits (RDKs) that support the
PCI 9656. These kits enable designers to
quickly bring new designs to production.
PLX Technology, Inc.
870 Maude Ave.
Sunnyvale, CA 94085 USA
Tel: [phone]
Tel: [phone]
Fax: [phone]
Email: [e-mail]
Web Site: www.plxtech.com
Interface
PCI Bus
Control Logic
P r o d u c t O r d e r i n g I n f o r m a t i o n
PCI 9656-BA66BI
PCI 9656-BA66BI G
CompactPCI 9656RDK-860
SDK-LITE
SDK-PRO
PCI 9656RDK-LITE
Master Xfers)
Ch 0/1 Xfers)
Slave Xfers)
Machines
PCI Master
PCI Master
(For Direct
PCI Target
(For Direct
(For DMA
Arbiter
PCI Bus
I
State
2
PCI
0 Messaging
Interrupts
sents the largest investment in development.
The PCI 9656 is fully compliant with PLX’s
SDK-LITE and SDK-PRO which enable quick
and easy development of high performance
local processor and host PCI software
through standard APIs, I 2 O messaging pro-
tocols, PCI debug tools, and sample drivers.
PCI 9656 Internal Block Diagram
PLX recognizes that software often repre-
Direct Master Write
Direct Master Read
Direct Slave Read
Direct Slave Write
Con guration
DMA Channel 0
DMA Channel 1
Dir. Slave Read
Direct Master
Hot Swap
Registers
Local Bus
Run-Time
PCI Bus
FIFOs
DMA
I
2
O
eliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX
and Generic 32-bit, 66MHz Bus Based Designs
and Generic 32-bit, 66MHz Bus Based Designs (Lead-Free)
PowerQUICC CPU and communications channels
for PLX I/O Accelerators and I/O Processors
for PLX I/O Accelerators and I/O Processors
for generic Local Bus designs
64-bit, 66 MHz PCI Bus Mastering I/O Accelerator for PowerQUICC
64-bit, 66 MHz PCI Bus Mastering I/O Accelerator for PowerQUICC
Windows Host-Side Software Development Kit
Windows Host-Side and Local-Side Software Development Kit
er product names that appear in this material are for identi cation purposes only and are acknowledged to be
PCI 9656 Rapid Development Kit with prototyping area
CompactPCI 9656 Rapid Development Kit with Motorola MPC860
Direct Slave
EEPROM
Serial EEPROM
– User-speci ed
– Vital Product
Master Xfers)
Local Master
Ch 0/1 Xfers)
Local Master
Slave Xfers)
Local Bus
Machines
Local Slave
register
initialzation
values
Data
(For Direct
(For Direct
(For DMA
State
Power Management
through RDKs that include a robust PCI
development platform, complete with
OrCAD schematics, documentation, a
PCI 9656 chip sample, and software.
DMA
Local Bus
Interface
– Dynamic Bus
– Endian
– Muxed or
Width (8-, 16-,
or 32-bit)
Conversion
non-Muxed
Address/Data
Buses
PCI 9656 design support is provided
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