HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 460
HD6412240
Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412240.pdf
(818 pages)
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Section 12 Serial Communication Interface (SCI)
Bit 6—Receive Data Register Full (RDRF): Indicates that the received data is stored in RDR.
Bit 6
RDRF
0
1
Notes: RDR and the RDRF flag are not affected and retain their previous values when an error is
Bit 5—Overrun Error (ORER): Indicates that an overrun error occurred during reception,
causing abnormal termination.
Bit 5
ORER
0
1
Notes: 1. The ORER flag is not affected and retains its previous state when the RE bit in SCR is
Rev.3.00 Mar. 26, 2007 Page 418 of 772
REJ09B0355-0300
detected during reception or when the RE bit in SCR is cleared to 0.
If reception of the next data is completed while the RDRF flag is still set to 1, an overrun
error will occur and the receive data will be lost.
* DTC can clear this bit only when DISEL is 0 with the transfer counter not being 0.
2. The receive data prior to the overrun error is retained in RDR, and the data received
cleared to 0.
subsequently is lost. Also, subsequent serial reception cannot be continued while the
ORER flag is set to 1. In clocked synchronous mode, serial transmission cannot be
continued, either.
Description
[Clearing conditions]
[Setting condition]
When serial reception ends normally and receive data is transferred from RSR to RDR
Description
[Clearing condition]
When 0 is written to ORER after reading ORER = 1
[Setting condition]
When the next serial reception is completed while RDRF = 1*
When 0 is written to RDRF after reading RDRF = 1
When the DTC* is activated by an RXI interrupt and read data from RDR
2
(Initial value)*
(Initial value)
1
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