HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 348
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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Example of Synchronous Operation: Figure 9.15 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGR0B compare match has been set as the channel 0 counter clearing source, and synchronous
clearing has been set for the channel 1 and 2 counter clearing source.
Three-phase PWM waveforms are output from pins TIOC0A, TIOC1A, and TIOC2A. At this
time, synchronous presetting, and synchronous clearing by TGR0B compare match, is performed
for channel 0 to 2 TCNT counters, and the data set in TGR0B is used as the PWM cycle.
For details of PWM modes, see section 9.4.6, PWM Modes.
TGR0B
TGR1B
TGR0A
TGR2B
TGR1A
TGR2A
H'0000
TIOC0A
TIOC1A
TIOC2A
TCNT0 to TCNT2 values
Figure 9.15 Example of Synchronous Operation
Synchronous clearing by TGR0B compare match
Time
331
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