HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 425
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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12.1
The H8S/2345 Series is equipped with a 2-channel serial communication interface (SCI). Both
channels have the same functions. The SCI can handle both asynchronous and clocked
synchronous serial communication. A function is also provided for serial communication between
processors (multiprocessor communication function).
12.1.1
SCI features are listed below.
Choice of asynchronous or clocked synchronous serial communication mode
Asynchronous mode
Clocked Synchronous mode
Serial data communication executed using asynchronous system in which synchronization
Serial data communication can be carried out with standard asynchronous communication
A multiprocessor communication function is provided that enables serial data
Choice of 12 serial data transfer formats
Receive error detection : Parity, overrun, and framing errors
Break detection
Serial data communication synchronized with a clock
One serial data transfer format
Receive error detection : Overrun errors detected
is achieved character by character
chips such as a Universal Asynchronous Receiver/Transmitter (UART) or Asynchronous
Communication Interface Adapter (ACIA)
communication with a number of processors
Data length
Stop bit length
Parity
Multiprocessor bit
Serial data communication can be carried out with other chips that have a synchronous
communication function
Data length
Section 12 Serial Communication Interface (SCI)
Overview
Features
: 7 or 8 bits
: 1 or 2 bits
: Even, odd, or none
: 1 or 0
: Break can be detected by reading the RxD pin level directly in
: 8 bits
case of a framing error
411
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